From c637a972707f9d5ef0d3ff7648a12be53a9b4be9 Mon Sep 17 00:00:00 2001
From: Richard Henderson <rth@twiddle.net>
Date: Sun, 11 Feb 2018 01:33:47 -0500
Subject: [PATCH] target-arm: Recognize UXTB, UXTH, LSR, LSL

These are all special case aliases of UBFM.

Backports commit 9924e85829fe21b5f38a5d267c9aea44c5d478ac from qemu
---
 qemu/target-arm/translate-a64.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/qemu/target-arm/translate-a64.c b/qemu/target-arm/translate-a64.c
index 495963ce..30ad5b4c 100644
--- a/qemu/target-arm/translate-a64.c
+++ b/qemu/target-arm/translate-a64.c
@@ -3032,6 +3032,23 @@ static void disas_bitfield(DisasContext *s, uint32_t insn)
             tcg_gen_sari_i64(tcg_ctx, tcg_rd, tcg_tmp, ri);
             goto done;
         }
+    } else if (opc == 2) { /* UBFM */
+        if (ri == 0) { /* UXTB, UXTH, plus non-canonical AND */
+            tcg_gen_andi_i64(tcg_ctx, tcg_rd, tcg_tmp, bitmask64(si + 1));
+            return;
+        }
+        if (si == 63 || (si == 31 && ri <= si)) { /* LSR */
+            if (si == 31) {
+                tcg_gen_ext32u_i64(tcg_ctx, tcg_tmp, tcg_tmp);
+            }
+            tcg_gen_shri_i64(tcg_ctx, tcg_rd, tcg_tmp, ri);
+            return;
+        }
+        if (si + 1 == ri && si != bitsize - 1) { /* LSL */
+            int shift = bitsize - 1 - si;
+            tcg_gen_shli_i64(tcg_ctx, tcg_rd, tcg_tmp, shift);
+            goto done;
+        }
     }
 
     if (opc != 1) { /* SBFM or UBFM */