diff --git a/qemu/target/mips/translate.c b/qemu/target/mips/translate.c
index 0adf7de9..1a00474c 100644
--- a/qemu/target/mips/translate.c
+++ b/qemu/target/mips/translate.c
@@ -6658,7 +6658,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
     const char *rn = "invalid";
 
     switch (reg) {
-    case 2:
+    case CPO_REGISTER_02:
         switch (sel) {
         case 0:
             CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
@@ -6669,7 +6669,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 3:
+    case CPO_REGISTER_03:
         switch (sel) {
         case 0:
             CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
@@ -6680,7 +6680,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 17:
+    case CPO_REGISTER_17:
         switch (sel) {
         case 0:
             gen_mfhc0_load64(ctx, arg, offsetof(CPUMIPSState, lladdr),
@@ -6696,7 +6696,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 28:
+    case CPO_REGISTER_28:
         switch (sel) {
         case 0:
         case 2:
@@ -6729,7 +6729,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
     uint64_t mask = ctx->PAMask >> 36;
 
     switch (reg) {
-    case 2:
+    case CPO_REGISTER_02:
         switch (sel) {
         case 0:
             CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
@@ -6741,7 +6741,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 3:
+    case CPO_REGISTER_03:
         switch (sel) {
         case 0:
             CP0_CHECK(ctx->hflags & MIPS_HFLAG_ELPA);
@@ -6753,7 +6753,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 17:
+    case CPO_REGISTER_17:
         switch (sel) {
         case 0:
             /* LLAddr is read-only (the only exception is bit 0 if LLB is
@@ -6771,7 +6771,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 28:
+    case CPO_REGISTER_28:
         switch (sel) {
         case 0:
         case 2:
@@ -6813,7 +6813,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         check_insn(ctx, ISA_MIPS32);
 
     switch (reg) {
-    case 0:
+    case CPO_REGISTER_00:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Index));
@@ -6843,7 +6843,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 1:
+    case CPO_REGISTER_01:
         switch (sel) {
         case 0:
             CP0_CHECK(!(ctx->insn_flags & ISA_MIPS32R6));
@@ -6889,7 +6889,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 2:
+    case CPO_REGISTER_02:
         switch (sel) {
         case 0:
             {
@@ -6947,7 +6947,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 3:
+    case CPO_REGISTER_03:
         switch (sel) {
         case 0:
             {
@@ -6975,7 +6975,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 4:
+    case CPO_REGISTER_04:
         switch (sel) {
         case 0:
             tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_Context));
@@ -6997,7 +6997,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 5:
+    case CPO_REGISTER_05:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_PageMask));
@@ -7044,7 +7044,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 6:
+    case CPO_REGISTER_06:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Wired));
@@ -7084,7 +7084,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 7:
+    case CPO_REGISTER_07:
         switch (sel) {
         case 0:
             check_insn(ctx, ISA_MIPS32R2);
@@ -7095,7 +7095,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 8:
+    case CPO_REGISTER_08:
         switch (sel) {
         case 0:
             tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr));
@@ -7116,7 +7116,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 9:
+    case CPO_REGISTER_09:
         switch (sel) {
         case 0:
             /* Mark as an IO operation because we read the time.  */
@@ -7139,7 +7139,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 10:
+    case CPO_REGISTER_10:
         switch (sel) {
         case 0:
             tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_EntryHi));
@@ -7150,7 +7150,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 11:
+    case CPO_REGISTER_11:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Compare));
@@ -7161,7 +7161,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 12:
+    case CPO_REGISTER_12:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Status));
@@ -7186,7 +7186,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
        }
         break;
-    case 13:
+    case CPO_REGISTER_13:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Cause));
@@ -7196,7 +7196,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
        }
         break;
-    case 14:
+    case CPO_REGISTER_14:
         switch (sel) {
         case 0:
             tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_EPC));
@@ -7207,7 +7207,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 15:
+    case CPO_REGISTER_15:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_PRid));
@@ -7230,7 +7230,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
        }
         break;
-    case 16:
+    case CPO_REGISTER_16:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Config0));
@@ -7269,7 +7269,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 17:
+    case CPO_REGISTER_17:
         switch (sel) {
         case 0:
             gen_helper_mfc0_lladdr(tcg_ctx, arg, tcg_ctx->cpu_env);
@@ -7289,7 +7289,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 18:
+    case CPO_REGISTER_18:
         switch (sel) {
         case 0:
         case 1:
@@ -7307,7 +7307,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 19:
+    case CPO_REGISTER_19:
         switch (sel) {
         case 0:
         case 1:
@@ -7325,7 +7325,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 20:
+    case CPO_REGISTER_20:
         switch (sel) {
         case 0:
 #if defined(TARGET_MIPS64)
@@ -7339,7 +7339,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 21:
+    case CPO_REGISTER_21:
        /* Officially reserved, but sel 0 is used for R1x000 framemask */
         CP0_CHECK(!(ctx->insn_flags & ISA_MIPS32R6));
         switch (sel) {
@@ -7351,11 +7351,11 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 22:
+    case CPO_REGISTER_22:
         tcg_gen_movi_tl(tcg_ctx, arg, 0); /* unimplemented */
         rn = "'Diagnostic"; /* implementation dependent */
         break;
-    case 23:
+    case CPO_REGISTER_23:
         switch (sel) {
         case 0:
             gen_helper_mfc0_debug(tcg_ctx, arg, tcg_ctx->cpu_env); /* EJTAG support */
@@ -7381,7 +7381,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 24:
+    case CPO_REGISTER_24:
         switch (sel) {
         case 0:
             /* EJTAG support */
@@ -7393,7 +7393,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 25:
+    case CPO_REGISTER_25:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Performance0));
@@ -7431,7 +7431,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 26:
+    case CPO_REGISTER_26:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_ErrCtl));
@@ -7441,7 +7441,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 27:
+    case CPO_REGISTER_27:
         switch (sel) {
         case 0:
         case 1:
@@ -7454,7 +7454,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 28:
+    case CPO_REGISTER_28:
         switch (sel) {
         case 0:
         case 2:
@@ -7479,7 +7479,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 29:
+    case CPO_REGISTER_29:
         switch (sel) {
         case 0:
         case 2:
@@ -7499,7 +7499,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 30:
+    case CPO_REGISTER_30:
         switch (sel) {
         case 0:
             tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_ErrorEPC));
@@ -7510,7 +7510,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 31:
+    case CPO_REGISTER_31:
         switch (sel) {
         case 0:
             /* EJTAG support */
@@ -7558,7 +7558,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
     //}
 
     switch (reg) {
-    case 0:
+    case CPO_REGISTER_00:
         switch (sel) {
         case 0:
             gen_helper_mtc0_index(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -7588,7 +7588,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 1:
+    case CPO_REGISTER_01:
         switch (sel) {
         case 0:
             /* ignored */
@@ -7635,7 +7635,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 2:
+    case CPO_REGISTER_02:
         switch (sel) {
         case 0:
             gen_helper_mtc0_entrylo0(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -7680,7 +7680,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 3:
+    case CPO_REGISTER_03:
         switch (sel) {
         case 0:
             gen_helper_mtc0_entrylo1(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -7695,7 +7695,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 4:
+    case CPO_REGISTER_04:
         switch (sel) {
         case 0:
             gen_helper_mtc0_context(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -7715,7 +7715,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 5:
+    case CPO_REGISTER_05:
         switch (sel) {
         case 0:
             gen_helper_mtc0_pagemask(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -7761,7 +7761,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 6:
+    case CPO_REGISTER_06:
         switch (sel) {
         case 0:
             gen_helper_mtc0_wired(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -7801,7 +7801,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 7:
+    case CPO_REGISTER_07:
         switch (sel) {
         case 0:
             check_insn(ctx, ISA_MIPS32R2);
@@ -7813,7 +7813,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 8:
+    case CPO_REGISTER_08:
         switch (sel) {
         case 0:
             /* ignored */
@@ -7831,7 +7831,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 9:
+    case CPO_REGISTER_09:
         switch (sel) {
         case 0:
             gen_helper_mtc0_count(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -7842,7 +7842,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 10:
+    case CPO_REGISTER_10:
         switch (sel) {
         case 0:
             gen_helper_mtc0_entryhi(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -7852,7 +7852,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 11:
+    case CPO_REGISTER_11:
         switch (sel) {
         case 0:
             gen_helper_mtc0_compare(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -7863,7 +7863,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 12:
+    case CPO_REGISTER_12:
         switch (sel) {
         case 0:
             save_cpu_state(ctx, 1);
@@ -7898,7 +7898,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 13:
+    case CPO_REGISTER_13:
         switch (sel) {
         case 0:
             save_cpu_state(ctx, 1);
@@ -7914,7 +7914,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 14:
+    case CPO_REGISTER_14:
         switch (sel) {
         case 0:
             tcg_gen_st_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_EPC));
@@ -7924,7 +7924,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 15:
+    case CPO_REGISTER_15:
         switch (sel) {
         case 0:
             /* ignored */
@@ -7939,7 +7939,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 16:
+    case CPO_REGISTER_16:
         switch (sel) {
         case 0:
             gen_helper_mtc0_config0(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -7988,7 +7988,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 17:
+    case CPO_REGISTER_17:
         switch (sel) {
         case 0:
             gen_helper_mtc0_lladdr(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -8008,7 +8008,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 18:
+    case CPO_REGISTER_18:
         switch (sel) {
         case 0:
         case 1:
@@ -8026,7 +8026,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 19:
+    case CPO_REGISTER_19:
         switch (sel) {
         case 0:
         case 1:
@@ -8044,7 +8044,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 20:
+    case CPO_REGISTER_20:
         switch (sel) {
         case 0:
 #if defined(TARGET_MIPS64)
@@ -8057,7 +8057,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 21:
+    case CPO_REGISTER_21:
        /* Officially reserved, but sel 0 is used for R1x000 framemask */
         CP0_CHECK(!(ctx->insn_flags & ISA_MIPS32R6));
         switch (sel) {
@@ -8069,11 +8069,11 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 22:
+    case CPO_REGISTER_22:
         /* ignored */
         rn = "Diagnostic"; /* implementation dependent */
         break;
-    case 23:
+    case CPO_REGISTER_23:
         switch (sel) {
         case 0:
             gen_helper_mtc0_debug(tcg_ctx, tcg_ctx->cpu_env, arg); /* EJTAG support */
@@ -8112,7 +8112,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 24:
+    case CPO_REGISTER_24:
         switch (sel) {
         case 0:
             /* EJTAG support */
@@ -8123,7 +8123,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 25:
+    case CPO_REGISTER_25:
         switch (sel) {
         case 0:
             gen_helper_mtc0_performance0(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -8161,7 +8161,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
        break;
-    case 26:
+    case CPO_REGISTER_26:
         switch (sel) {
         case 0:
             gen_helper_mtc0_errctl(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -8172,7 +8172,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 27:
+    case CPO_REGISTER_27:
         switch (sel) {
         case 0:
         case 1:
@@ -8185,7 +8185,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
        break;
-    case 28:
+    case CPO_REGISTER_28:
         switch (sel) {
         case 0:
         case 2:
@@ -8205,7 +8205,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 29:
+    case CPO_REGISTER_29:
         switch (sel) {
         case 0:
         case 2:
@@ -8226,7 +8226,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
        break;
-    case 30:
+    case CPO_REGISTER_30:
         switch (sel) {
         case 0:
             tcg_gen_st_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_ErrorEPC));
@@ -8236,7 +8236,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 31:
+    case CPO_REGISTER_31:
         switch (sel) {
         case 0:
             /* EJTAG support */
@@ -8287,7 +8287,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         check_insn(ctx, ISA_MIPS64);
 
     switch (reg) {
-    case 0:
+    case CPO_REGISTER_00:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Index));
@@ -8317,7 +8317,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 1:
+    case CPO_REGISTER_01:
         switch (sel) {
         case 0:
             CP0_CHECK(!(ctx->insn_flags & ISA_MIPS32R6));
@@ -8363,7 +8363,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 2:
+    case CPO_REGISTER_02:
         switch (sel) {
         case 0:
             tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_EntryLo0));
@@ -8408,7 +8408,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 3:
+    case CPO_REGISTER_03:
         switch (sel) {
         case 0:
             tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_EntryLo1));
@@ -8423,7 +8423,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 4:
+    case CPO_REGISTER_04:
         switch (sel) {
         case 0:
             tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_Context));
@@ -8443,7 +8443,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 5:
+    case CPO_REGISTER_05:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_PageMask));
@@ -8488,7 +8488,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 6:
+    case CPO_REGISTER_06:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Wired));
@@ -8528,7 +8528,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 7:
+    case CPO_REGISTER_07:
         switch (sel) {
         case 0:
             check_insn(ctx, ISA_MIPS32R2);
@@ -8539,7 +8539,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 8:
+    case CPO_REGISTER_08:
         switch (sel) {
         case 0:
             tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_BadVAddr));
@@ -8559,7 +8559,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 9:
+    case CPO_REGISTER_09:
         switch (sel) {
         case 0:
             /* Mark as an IO operation because we read the time.  */
@@ -8582,7 +8582,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 10:
+    case CPO_REGISTER_10:
         switch (sel) {
         case 0:
             tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_EntryHi));
@@ -8592,7 +8592,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 11:
+    case CPO_REGISTER_11:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Compare));
@@ -8603,7 +8603,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 12:
+    case CPO_REGISTER_12:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Status));
@@ -8628,7 +8628,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 13:
+    case CPO_REGISTER_13:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Cause));
@@ -8638,7 +8638,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 14:
+    case CPO_REGISTER_14:
         switch (sel) {
         case 0:
             tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_EPC));
@@ -8648,7 +8648,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 15:
+    case CPO_REGISTER_15:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_PRid));
@@ -8669,7 +8669,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 16:
+    case CPO_REGISTER_16:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Config0));
@@ -8708,7 +8708,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 17:
+    case CPO_REGISTER_17:
         switch (sel) {
         case 0:
             gen_helper_dmfc0_lladdr(tcg_ctx, arg, tcg_ctx->cpu_env);
@@ -8728,7 +8728,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 18:
+    case CPO_REGISTER_18:
         switch (sel) {
         case 0:
         case 1:
@@ -8746,7 +8746,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 19:
+    case CPO_REGISTER_19:
         switch (sel) {
         case 0:
         case 1:
@@ -8764,7 +8764,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 20:
+    case CPO_REGISTER_20:
         switch (sel) {
         case 0:
             check_insn(ctx, ISA_MIPS3);
@@ -8775,7 +8775,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 21:
+    case CPO_REGISTER_21:
        /* Officially reserved, but sel 0 is used for R1x000 framemask */
         CP0_CHECK(!(ctx->insn_flags & ISA_MIPS32R6));
         switch (sel) {
@@ -8787,11 +8787,11 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 22:
+    case CPO_REGISTER_22:
         tcg_gen_movi_tl(tcg_ctx, arg, 0); /* unimplemented */
         rn = "'Diagnostic"; /* implementation dependent */
         break;
-    case 23:
+    case CPO_REGISTER_23:
         switch (sel) {
         case 0:
             gen_helper_mfc0_debug(tcg_ctx, arg, tcg_ctx->cpu_env); /* EJTAG support */
@@ -8817,7 +8817,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 24:
+    case CPO_REGISTER_24:
         switch (sel) {
         case 0:
             /* EJTAG support */
@@ -8828,7 +8828,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 25:
+    case CPO_REGISTER_25:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Performance0));
@@ -8866,7 +8866,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 26:
+    case CPO_REGISTER_26:
         switch (sel) {
         case 0:
             gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_ErrCtl));
@@ -8876,7 +8876,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 27:
+    case CPO_REGISTER_27:
         switch (sel) {
         /* ignored */
         case 0:
@@ -8890,7 +8890,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 28:
+    case CPO_REGISTER_28:
         switch (sel) {
         case 0:
         case 2:
@@ -8910,7 +8910,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 29:
+    case CPO_REGISTER_29:
         switch (sel) {
         case 0:
         case 2:
@@ -8930,7 +8930,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 30:
+    case CPO_REGISTER_30:
         switch (sel) {
         case 0:
             tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_ErrorEPC));
@@ -8940,7 +8940,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 31:
+    case CPO_REGISTER_31:
         switch (sel) {
         case 0:
             /* EJTAG support */
@@ -8987,7 +8987,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
     //}
 
     switch (reg) {
-    case 0:
+    case CPO_REGISTER_00:
         switch (sel) {
         case 0:
             gen_helper_mtc0_index(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9017,7 +9017,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 1:
+    case CPO_REGISTER_01:
         switch (sel) {
         case 0:
             /* ignored */
@@ -9062,7 +9062,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 2:
+    case CPO_REGISTER_02:
         switch (sel) {
         case 0:
             gen_helper_dmtc0_entrylo0(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9107,7 +9107,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 3:
+    case CPO_REGISTER_03:
         switch (sel) {
         case 0:
             gen_helper_dmtc0_entrylo1(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9122,7 +9122,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 4:
+    case CPO_REGISTER_04:
         switch (sel) {
         case 0:
             gen_helper_mtc0_context(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9142,7 +9142,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 5:
+    case CPO_REGISTER_05:
         switch (sel) {
         case 0:
             gen_helper_mtc0_pagemask(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9187,7 +9187,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 6:
+    case CPO_REGISTER_06:
         switch (sel) {
         case 0:
             gen_helper_mtc0_wired(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9227,7 +9227,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 7:
+    case CPO_REGISTER_07:
         switch (sel) {
         case 0:
             check_insn(ctx, ISA_MIPS32R2);
@@ -9239,7 +9239,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 8:
+    case CPO_REGISTER_08:
         switch (sel) {
         case 0:
             /* ignored */
@@ -9257,7 +9257,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 9:
+    case CPO_REGISTER_09:
         switch (sel) {
         case 0:
             gen_helper_mtc0_count(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9270,7 +9270,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         /* Stop translation as we may have switched the execution mode */
         ctx->base.is_jmp = DISAS_STOP;
         break;
-    case 10:
+    case CPO_REGISTER_10:
         switch (sel) {
         case 0:
             gen_helper_mtc0_entryhi(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9280,7 +9280,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 11:
+    case CPO_REGISTER_11:
         switch (sel) {
         case 0:
             gen_helper_mtc0_compare(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9293,7 +9293,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         /* Stop translation as we may have switched the execution mode */
         ctx->base.is_jmp = DISAS_STOP;
         break;
-    case 12:
+    case CPO_REGISTER_12:
         switch (sel) {
         case 0:
             save_cpu_state(ctx, 1);
@@ -9328,7 +9328,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 13:
+    case CPO_REGISTER_13:
         switch (sel) {
         case 0:
             save_cpu_state(ctx, 1);
@@ -9344,7 +9344,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 14:
+    case CPO_REGISTER_14:
         switch (sel) {
         case 0:
             tcg_gen_st_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_EPC));
@@ -9354,7 +9354,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 15:
+    case CPO_REGISTER_15:
         switch (sel) {
         case 0:
             /* ignored */
@@ -9369,7 +9369,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 16:
+    case CPO_REGISTER_16:
         switch (sel) {
         case 0:
             gen_helper_mtc0_config0(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9409,7 +9409,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 17:
+    case CPO_REGISTER_17:
         switch (sel) {
         case 0:
             gen_helper_mtc0_lladdr(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9429,7 +9429,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 18:
+    case CPO_REGISTER_18:
         switch (sel) {
         case 0:
         case 1:
@@ -9447,7 +9447,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 19:
+    case CPO_REGISTER_19:
         switch (sel) {
         case 0:
         case 1:
@@ -9465,7 +9465,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 20:
+    case CPO_REGISTER_20:
         switch (sel) {
         case 0:
             check_insn(ctx, ISA_MIPS3);
@@ -9476,7 +9476,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 21:
+    case CPO_REGISTER_21:
        /* Officially reserved, but sel 0 is used for R1x000 framemask */
         CP0_CHECK(!(ctx->insn_flags & ISA_MIPS32R6));
         switch (sel) {
@@ -9488,11 +9488,11 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 22:
+    case CPO_REGISTER_22:
         /* ignored */
         rn = "Diagnostic"; /* implementation dependent */
         break;
-    case 23:
+    case CPO_REGISTER_23:
         switch (sel) {
         case 0:
             gen_helper_mtc0_debug(tcg_ctx, tcg_ctx->cpu_env, arg); /* EJTAG support */
@@ -9529,7 +9529,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 24:
+    case CPO_REGISTER_24:
         switch (sel) {
         case 0:
             /* EJTAG support */
@@ -9540,7 +9540,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 25:
+    case CPO_REGISTER_25:
         switch (sel) {
         case 0:
             gen_helper_mtc0_performance0(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9578,7 +9578,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 26:
+    case CPO_REGISTER_26:
         switch (sel) {
         case 0:
             gen_helper_mtc0_errctl(tcg_ctx, tcg_ctx->cpu_env, arg);
@@ -9589,7 +9589,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 27:
+    case CPO_REGISTER_27:
         switch (sel) {
         case 0:
         case 1:
@@ -9602,7 +9602,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 28:
+    case CPO_REGISTER_28:
         switch (sel) {
         case 0:
         case 2:
@@ -9622,7 +9622,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 29:
+    case CPO_REGISTER_29:
         switch (sel) {
         case 0:
         case 2:
@@ -9643,7 +9643,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 30:
+    case CPO_REGISTER_30:
         switch (sel) {
         case 0:
             tcg_gen_st_tl(tcg_ctx, arg, tcg_ctx->cpu_env, offsetof(CPUMIPSState, CP0_ErrorEPC));
@@ -9653,7 +9653,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
             goto cp0_unimplemented;
         }
         break;
-    case 31:
+    case CPO_REGISTER_31:
         switch (sel) {
         case 0:
             /* EJTAG support */