From af17f7fa599556b86f2c58c1f763f47eb5dc5bc1 Mon Sep 17 00:00:00 2001 From: Aaron Lindsay OS Date: Fri, 15 Feb 2019 17:11:51 -0500 Subject: [PATCH] target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR This bug was introduced in: commit 5ecdd3e47cadae83a62dc92b472f1fe163b56f59 target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER Backports commit 62c7ec3488fe0dcbabffd543f458914e27736115 from qemu --- qemu/target/arm/helper.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c index a76cc4f3..f7b4ad57 100644 --- a/qemu/target/arm/helper.c +++ b/qemu/target/arm/helper.c @@ -5134,17 +5134,17 @@ void register_cp_regs_for_features(ARMCPU *cpu) char *pmevtyper_name = g_strdup_printf("PMEVTYPER%d", i); char *pmevtyper_el0_name = g_strdup_printf("PMEVTYPER%d_EL0", i); ARMCPRegInfo pmev_regs[] = { - { pmevcntr_name, 15, 15, 8 | (3 & (i >> 3)), 0,0,i & 7, + { pmevcntr_name, 15, 14, 8 | (3 & (i >> 3)), 0,0,i & 7, 0, ARM_CP_IO | ARM_CP_ALIAS, PL0_RW, 0, NULL, 0, 0, {0, 0}, pmreg_access, pmevcntr_readfn, pmevcntr_writefn }, - { pmevcntr_el0_name, 0,15, 8 | (3 & (i >> 3)), 3,3,i & 7, + { pmevcntr_el0_name, 0,14, 8 | (3 & (i >> 3)), 3,3,i & 7, ARM_CP_STATE_AA64, ARM_CP_IO, PL0_RW, 0, NULL, 0, 0, {0, 0}, pmreg_access, pmevcntr_readfn, pmevcntr_writefn, pmevcntr_rawread, pmevcntr_rawwrite }, - { pmevtyper_name, 15,15,12 | (3 & (i >> 3)), 0,0,i & 7, + { pmevtyper_name, 15,14,12 | (3 & (i >> 3)), 0,0,i & 7, 0, ARM_CP_IO | ARM_CP_ALIAS, PL0_RW, 0, NULL, 0, 0, {0, 0}, pmreg_access, pmevtyper_readfn, pmevtyper_writefn }, - { pmevtyper_el0_name, 0,15,12 | (3 & (i >> 3)), 3,3,i & 7, + { pmevtyper_el0_name, 0,14,12 | (3 & (i >> 3)), 3,3,i & 7, ARM_CP_STATE_AA64, ARM_CP_IO, PL0_RW, 0, NULL, 0, 0, {0, 0}, pmreg_access, pmevtyper_readfn, pmevtyper_writefn, NULL, pmevtyper_rawwrite },