From aca671b3b16942b2cf21dd7553a40dc8d303a68e Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 1 Mar 2018 23:36:39 -0500 Subject: [PATCH] target-arm: Enable EL2 feature bit on A53 and A57 Enable the ARM_FEATURE_EL2 bit on Cortex-A52 and Cortex-A57, since this is all now sufficiently implemented to work with the GICv3. We provide the usual CPU property to disable it for backwards compatibility with the older virt boards. In this commit, we disable the EL2 feature on the virt and ZynpMP boards, so there is no overall effect. Another commit will expose a board-level property to allow the user to enable EL2. Backports commit c25bd18a04c8bd0f19556d719864b7b08528222d from qemu --- qemu/target/arm/cpu.c | 4 ++++ qemu/target/arm/cpu.h | 2 ++ qemu/target/arm/cpu64.c | 2 ++ 3 files changed, 8 insertions(+) diff --git a/qemu/target/arm/cpu.c b/qemu/target/arm/cpu.c index c3e5fd64..f980b0c7 100644 --- a/qemu/target/arm/cpu.c +++ b/qemu/target/arm/cpu.c @@ -540,6 +540,10 @@ static int arm_cpu_realizefn(struct uc_struct *uc, DeviceState *dev, Error **err cpu->id_aa64pfr0 &= ~0xf000; } + if (!cpu->has_el2) { + unset_feature(env, ARM_FEATURE_EL2); + } + if (!cpu->has_pmu) { cpu->has_pmu = false; unset_feature(env, ARM_FEATURE_PMU); diff --git a/qemu/target/arm/cpu.h b/qemu/target/arm/cpu.h index 56efa808..395beac2 100644 --- a/qemu/target/arm/cpu.h +++ b/qemu/target/arm/cpu.h @@ -585,6 +585,8 @@ typedef struct ARMCPU { bool start_powered_off; /* CPU currently in PSCI powered-off state */ bool powered_off; + /* CPU has virtualization extension */ + bool has_el2; /* CPU has security extension */ bool has_el3; /* CPU has PMU (Performance Monitor Unit) */ diff --git a/qemu/target/arm/cpu64.c b/qemu/target/arm/cpu64.c index afecfc67..ccaf1b14 100644 --- a/qemu/target/arm/cpu64.c +++ b/qemu/target/arm/cpu64.c @@ -92,6 +92,7 @@ static void aarch64_a57_initfn(struct uc_struct *uc, Object *obj, void *opaque) set_feature(&cpu->env, ARM_FEATURE_V8_SHA256); set_feature(&cpu->env, ARM_FEATURE_V8_PMULL); set_feature(&cpu->env, ARM_FEATURE_CRC); + set_feature(&cpu->env, ARM_FEATURE_EL2); set_feature(&cpu->env, ARM_FEATURE_EL3); set_feature(&cpu->env, ARM_FEATURE_PMU); cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A57; @@ -148,6 +149,7 @@ static void aarch64_a53_initfn(struct uc_struct *uc, Object *obj, void *opaque) set_feature(&cpu->env, ARM_FEATURE_V8_SHA256); set_feature(&cpu->env, ARM_FEATURE_V8_PMULL); set_feature(&cpu->env, ARM_FEATURE_CRC); + set_feature(&cpu->env, ARM_FEATURE_EL2); set_feature(&cpu->env, ARM_FEATURE_EL3); set_feature(&cpu->env, ARM_FEATURE_PMU); cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A53;