From a9eb62d21184d6a96ae7bd54f7492788905a7cb6 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 25 Feb 2021 17:42:38 -0500 Subject: [PATCH] target/arm: Tidy trans_LD1R_zpri Move the variable declarations to the top of the function, but do not create a new label before sve_access_check. Backports commit c0ed9166b1aea86a2fbaada1195aacd1049f9e85 from qemu --- qemu/target/arm/translate-sve.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/qemu/target/arm/translate-sve.c b/qemu/target/arm/translate-sve.c index 3bac0281..ba245598 100644 --- a/qemu/target/arm/translate-sve.c +++ b/qemu/target/arm/translate-sve.c @@ -5050,18 +5050,20 @@ static bool trans_LD1RQ_zpri(DisasContext *s, arg_rpri_load *a) /* Load and broadcast element. */ static bool trans_LD1R_zpri(DisasContext *s, arg_rpri_load *a) { - if (!sve_access_check(s)) { - return true; - } - TCGContext *tcg_ctx = s->uc->tcg_ctx; unsigned vsz = vec_full_reg_size(s); unsigned psz = pred_full_reg_size(s); unsigned esz = dtype_esz[a->dtype]; unsigned msz = dtype_msz(a->dtype); - TCGLabel *over = gen_new_label(tcg_ctx); + TCGLabel *over; TCGv_i64 temp; + if (!sve_access_check(s)) { + return true; + } + + over = gen_new_label(tcg_ctx); + /* If the guarding predicate has no bits set, no load occurs. */ if (psz <= 8) { /* Reduce the pred_esz_masks value simply to reduce the