diff --git a/qemu/target-arm/unicorn_arm.c b/qemu/target-arm/unicorn_arm.c index d64d4a0d..674e7db8 100644 --- a/qemu/target-arm/unicorn_arm.c +++ b/qemu/target-arm/unicorn_arm.c @@ -82,10 +82,10 @@ int arm_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun *(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[15]; break; case UC_ARM_REG_C1_C0_2: - *(int32_t *)value = ARM_CPU(uc, mycpu)->env.cp15.c1_coproc; + *(int32_t *)value = ARM_CPU(uc, mycpu)->env.cp15.cpacr_el1; break; case UC_ARM_REG_C13_C0_3: - *(int32_t *)value = ARM_CPU(uc, mycpu)->env.cp15.tpidrro_el0; + *(int32_t *)value = ARM_CPU(uc, mycpu)->env.cp15.tpidrro_el[0]; break; case UC_ARM_REG_FPEXC: *(int32_t *)value = ARM_CPU(uc, mycpu)->env.vfp.xregs[ARM_VFP_FPEXC]; @@ -137,11 +137,11 @@ int arm_reg_write(struct uc_struct *uc, unsigned int *regs, void* const* vals, i break; case UC_ARM_REG_C1_C0_2: - ARM_CPU(uc, mycpu)->env.cp15.c1_coproc = *(int32_t *)value; + ARM_CPU(uc, mycpu)->env.cp15.cpacr_el1 = *(int32_t *)value; break; case UC_ARM_REG_C13_C0_3: - ARM_CPU(uc, mycpu)->env.cp15.tpidrro_el0 = *(int32_t *)value; + ARM_CPU(uc, mycpu)->env.cp15.tpidrro_el[0] = *(int32_t *)value; break; case UC_ARM_REG_FPEXC: ARM_CPU(uc, mycpu)->env.vfp.xregs[ARM_VFP_FPEXC] = *(int32_t *)value; diff --git a/qemu/target-m68k/translate.c b/qemu/target-m68k/translate.c index 86c34896..1a05fd0e 100644 --- a/qemu/target-m68k/translate.c +++ b/qemu/target-m68k/translate.c @@ -3136,7 +3136,7 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb, tcg_ctx->gen_opc_instr_start[lj] = 1; //tcg_ctx.gen_opc_icount[lj] = num_insns; } - tcg_gen_insn_start(tcg_ctx, s->pc); + tcg_gen_insn_start(tcg_ctx, dc->pc); num_insns++; //if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) {