From 9156b8f3cec1dbb138630880956145194cb416b3 Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Sat, 17 Feb 2018 13:27:41 -0500 Subject: [PATCH] target-arm: Avoid inline for get_phys_addr Avoid inline for get_phys_addr() to prepare for future recursive use. Backports commit af51f566ec7106d5e834476e78681a7b354f3c7c from qemu --- qemu/target-arm/helper.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/qemu/target-arm/helper.c b/qemu/target-arm/helper.c index a4d5d9e8..a47fc0ff 100644 --- a/qemu/target-arm/helper.c +++ b/qemu/target-arm/helper.c @@ -9,10 +9,10 @@ #include "arm_ldst.h" #ifndef CONFIG_USER_ONLY -static inline bool get_phys_addr(CPUARMState *env, target_ulong address, - int access_type, ARMMMUIdx mmu_idx, - hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot, - target_ulong *page_size, uint32_t *fsr); +static bool get_phys_addr(CPUARMState *env, target_ulong address, + int access_type, ARMMMUIdx mmu_idx, + hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot, + target_ulong *page_size, uint32_t *fsr); /* Definitions for the PMCCNTR and PMCR registers */ #define PMCRD 0x8 @@ -6478,10 +6478,10 @@ static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, * @page_size: set to the size of the page containing phys_ptr * @fsr: set to the DFSR/IFSR value on failure */ -static inline bool get_phys_addr(CPUARMState *env, target_ulong address, - int access_type, ARMMMUIdx mmu_idx, - hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot, - target_ulong *page_size, uint32_t *fsr) +static bool get_phys_addr(CPUARMState *env, target_ulong address, + int access_type, ARMMMUIdx mmu_idx, + hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot, + target_ulong *page_size, uint32_t *fsr) { if (mmu_idx == ARMMMUIdx_S12NSE0 || mmu_idx == ARMMMUIdx_S12NSE1) { /* TODO: when we support EL2 we should here call ourselves recursively