From 85ccd1a71ef42a971cd275cb59a017b2d5235594 Mon Sep 17 00:00:00 2001 From: Jim Shu Date: Tue, 30 Mar 2021 15:09:11 -0400 Subject: [PATCH] target/riscv: flush TLB pages if PMP permission has been changed If PMP permission of any address has been changed by updating PMP entry, flush all TLB pages to prevent from getting old permission. Backports 2c2e0f2842520bcd25472285cfce39696e52e662 --- qemu/target/riscv/pmp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/qemu/target/riscv/pmp.c b/qemu/target/riscv/pmp.c index 52771042..46bd91a1 100644 --- a/qemu/target/riscv/pmp.c +++ b/qemu/target/riscv/pmp.c @@ -28,6 +28,7 @@ #include "qapi/error.h" #include "cpu.h" #include "qemu-common.h" +#include "exec/exec-all.h" #ifndef CONFIG_USER_ONLY @@ -350,6 +351,9 @@ void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index, cfg_val = (val >> 8 * i) & 0xff; pmp_write_cfg(env, (reg_index * 4) + i, cfg_val); } + + /* If PMP permission of any addr has been changed, flush TLB pages. */ + tlb_flush(env_cpu(env)); }