From 765dbb57f0dddff977d369a120b54f3c83c8f38b Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Fri, 15 May 2020 21:50:28 -0400 Subject: [PATCH] target/arm: Clear tail in gvec_fmul_idx_*, gvec_fmla_idx_* Must clear the tail for AdvSIMD when SVE is enabled. Fixes: ca40a6e6e39 Backports commit 525d9b6d42844e187211d25b69be8b378785bc24 from qemu --- qemu/target/arm/vec_helper.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qemu/target/arm/vec_helper.c b/qemu/target/arm/vec_helper.c index da37b836..caf27be4 100644 --- a/qemu/target/arm/vec_helper.c +++ b/qemu/target/arm/vec_helper.c @@ -748,6 +748,7 @@ void HELPER(NAME)(void *vd, void *vn, void *vm, void *stat, uint32_t desc) \ d[i + j] = TYPE##_mul(n[i + j], mm, stat); \ } \ } \ + clear_tail(d, oprsz, simd_maxsz(desc)); \ } DO_MUL_IDX(gvec_fmul_idx_h, float16, H2) @@ -772,6 +773,7 @@ void HELPER(NAME)(void *vd, void *vn, void *vm, void *va, \ mm, a[i + j], 0, stat); \ } \ } \ + clear_tail(d, oprsz, simd_maxsz(desc)); \ } DO_FMLA_IDX(gvec_fmla_idx_h, float16, H2)