From 740264543625ac0606b09c8aabb5d1c8faf5153a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?R=C3=A9mi=20Denis-Courmont?= Date: Thu, 4 Mar 2021 13:42:03 -0500 Subject: [PATCH] target/arm: remove redundant tests In this context, the HCR value is the effective value, and thus is zero in secure mode. The tests for HCR.{F,I}MO are sufficient. Backports cc974d5cd84ea60a3dad59752aea712f3d47f8ce --- qemu/target/arm/cpu.c | 8 ++++---- qemu/target/arm/helper.c | 10 ++++------ 2 files changed, 8 insertions(+), 10 deletions(-) diff --git a/qemu/target/arm/cpu.c b/qemu/target/arm/cpu.c index fa500478..67965755 100644 --- a/qemu/target/arm/cpu.c +++ b/qemu/target/arm/cpu.c @@ -444,14 +444,14 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, break; case EXCP_VFIQ: - if (secure || !(hcr_el2 & HCR_FMO) || (hcr_el2 & HCR_TGE)) { - /* VFIQs are only taken when hypervized and non-secure. */ + if (!(hcr_el2 & HCR_FMO) || (hcr_el2 & HCR_TGE)) { + /* VFIQs are only taken when hypervized. */ return false; } return !(env->daif & PSTATE_F); case EXCP_VIRQ: - if (secure || !(hcr_el2 & HCR_IMO) || (hcr_el2 & HCR_TGE)) { - /* VIRQs are only taken when hypervized and non-secure. */ + if (!(hcr_el2 & HCR_IMO) || (hcr_el2 & HCR_TGE)) { + /* VIRQs are only taken when hypervized. */ return false; } return !(env->daif & PSTATE_I); diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c index 894de27f..b67de969 100644 --- a/qemu/target/arm/helper.c +++ b/qemu/target/arm/helper.c @@ -1783,13 +1783,11 @@ static void csselr_write(CPUARMState *env, const ARMCPRegInfo *ri, static uint64_t isr_read(CPUARMState *env, const ARMCPRegInfo *ri) { CPUState *cs = env_cpu(env); - uint64_t hcr_el2 = arm_hcr_el2_eff(env); + bool el1 = arm_current_el(env) == 1; + uint64_t hcr_el2 = el1 ? arm_hcr_el2_eff(env) : 0; uint64_t ret = 0; - bool allow_virt = (arm_current_el(env) == 1 && - (!arm_is_secure_below_el3(env) || - (env->cp15.scr_el3 & SCR_EEL2))); - if (allow_virt && (hcr_el2 & HCR_IMO)) { + if (hcr_el2 & HCR_IMO) { if (cs->interrupt_request & CPU_INTERRUPT_VIRQ) { ret |= CPSR_I; } @@ -1799,7 +1797,7 @@ static uint64_t isr_read(CPUARMState *env, const ARMCPRegInfo *ri) } } - if (allow_virt && (hcr_el2 & HCR_FMO)) { + if (hcr_el2 & HCR_FMO) { if (cs->interrupt_request & CPU_INTERRUPT_VFIQ) { ret |= CPSR_F; }