From 6cd06169eeab28a2a2c774d7ebf676c3cbd46b11 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 1 Mar 2021 19:50:16 -0500 Subject: [PATCH] target/arm: Make '-cpu max' have a 48-bit PA QEMU supports a 48-bit physical address range, but we don't currently expose it in the '-cpu max' ID registers (you get the same range as Cortex-A57, which is 44 bits). Set the ID_AA64MMFR0.PARange field to indicate 48 bits. Backports d1b6b7017572e8d82f26eb827a1dba0e8cf3cae6 --- qemu/target/arm/cpu64.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/qemu/target/arm/cpu64.c b/qemu/target/arm/cpu64.c index 0dd3d79a..e07740de 100644 --- a/qemu/target/arm/cpu64.c +++ b/qemu/target/arm/cpu64.c @@ -306,6 +306,10 @@ static void aarch64_max_initfn(struct uc_struct *uc, Object *obj, void *opaque) t = FIELD_DP64(t, ID_AA64PFR1, MTE, 2); cpu->isar.id_aa64pfr1 = t; + t = cpu->isar.id_aa64mmfr0; + t = FIELD_DP64(t, ID_AA64MMFR0, PARANGE, 5); /* PARange: 48 bits */ + cpu->isar.id_aa64mmfr0 = t; + t = cpu->isar.id_aa64mmfr1; t = FIELD_DP64(t, ID_AA64MMFR1, HPDS, 1); /* HPD */ t = FIELD_DP64(t, ID_AA64MMFR1, LO, 1);