From 6b4f7a28b5c43ebdedd31aaddf0add170d45c0c3 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 5 Feb 2019 16:55:49 -0500 Subject: [PATCH] target/arm: Introduce isar_feature_aa64_bti Also create field definitions for id_aa64pfr1 from ARMv8.5. Backports commit be53b6f4d7ace2e6a018e45af825069ccb7bab66 from qemu --- qemu/target/arm/cpu.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/qemu/target/arm/cpu.h b/qemu/target/arm/cpu.h index 323393d0..542cdfa2 100644 --- a/qemu/target/arm/cpu.h +++ b/qemu/target/arm/cpu.h @@ -1623,6 +1623,11 @@ FIELD(ID_AA64PFR0, GIC, 24, 4) FIELD(ID_AA64PFR0, RAS, 28, 4) FIELD(ID_AA64PFR0, SVE, 32, 4) +FIELD(ID_AA64PFR1, BT, 0, 4) +FIELD(ID_AA64PFR1, SBSS, 4, 4) +FIELD(ID_AA64PFR1, MTE, 8, 4) +FIELD(ID_AA64PFR1, RAS_FRAC, 12, 4) + FIELD(ID_AA64MMFR0, PARANGE, 0, 4) FIELD(ID_AA64MMFR0, ASIDBITS, 4, 4) FIELD(ID_AA64MMFR0, BIGEND, 8, 4) @@ -3309,6 +3314,11 @@ static inline bool isar_feature_aa64_lor(const ARMISARegisters *id) return FIELD_EX64(id->id_aa64mmfr1, ID_AA64MMFR1, LO) != 0; } +static inline bool isar_feature_aa64_bti(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, BT) != 0; +} + /* * Forward to the above feature tests given an ARMCPU pointer. */