diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c index 64a67087..8dfa962c 100644 --- a/qemu/target/arm/helper.c +++ b/qemu/target/arm/helper.c @@ -10513,13 +10513,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, bool aarch64 = arm_el_is_aa64(env, el); bool guarded = false; - /* - * TODO: - * This code does not handle the different format TCR for VTCR_EL2. - * This code also does not support shareability levels. - * Attribute and permission bit handling should also be checked when adding - * support for those page table walks. - */ + /* TODO: This code does not support shareability levels. */ if (aarch64) { param = aa64_va_parameters(env, address, mmu_idx, access_type != MMU_INST_FETCH);