From 475062aca9516bb67d4f3cb70ddd0c7ec294af60 Mon Sep 17 00:00:00 2001 From: Konrad Rzeszutek Wilk Date: Tue, 3 Jul 2018 00:24:56 -0400 Subject: [PATCH] i386: Define AMD's no SSB mitigation needed. AMD future CPUs expose a mechanism to tell the guest that the Speculative Store Bypass Disable is not needed and that the CPU is all good. This is exposed via the CPUID 8000_0008.EBX[26] bit. See 124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf A copy of this document is available at https://bugzilla.kernel.org/show_bug.cgi?id=199889 Backports commit 254790a909a2f153d689bfa7d8e8f0386cda870d from qemu --- qemu/target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qemu/target/i386/cpu.c b/qemu/target/i386/cpu.c index e30b3516..606cd9e7 100644 --- a/qemu/target/i386/cpu.c +++ b/qemu/target/i386/cpu.c @@ -909,7 +909,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = { "ibpb", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, - "amd-ssbd", "virt-ssbd", NULL, NULL, + "amd-ssbd", "virt-ssbd", "amd-no-ssb", NULL, NULL, NULL, NULL, NULL, }, 0x80000008,