From 4729b633f178146efaf0e1350278cfc06c0ec24b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= <f4bug@amsat.org>
Date: Mon, 5 Mar 2018 00:29:51 -0500
Subject: [PATCH] mips: call cpu_mips_realize_env() from mips_cpu_realizefn()

This changes the order between cpu_mips_realize_env() and
cpu_exec_initfn(), but cpu_exec_initfn() don't have anything that
depends on cpu_mips_realize_env() being called first.

Backports commit df4dc10284e1d871db8adb512816a561473ffe3e from qemu
---
 qemu/target/mips/cpu.c       | 3 +++
 qemu/target/mips/translate.c | 2 --
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/qemu/target/mips/cpu.c b/qemu/target/mips/cpu.c
index b883b122..053f2231 100644
--- a/qemu/target/mips/cpu.c
+++ b/qemu/target/mips/cpu.c
@@ -108,8 +108,11 @@ static void mips_cpu_reset(CPUState *s)
 static int mips_cpu_realizefn(struct uc_struct *uc, DeviceState *dev, Error **errp)
 {
     CPUState *cs = CPU(dev);
+    MIPSCPU *cpu = MIPS_CPU(uc, dev);
     MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(uc, dev);
 
+    cpu_mips_realize_env(&cpu->env);
+
     cpu_reset(cs);
     qemu_init_vcpu(cs);
 
diff --git a/qemu/target/mips/translate.c b/qemu/target/mips/translate.c
index 0c1f0037..51b17eb6 100644
--- a/qemu/target/mips/translate.c
+++ b/qemu/target/mips/translate.c
@@ -20740,8 +20740,6 @@ MIPSCPU *cpu_mips_init(struct uc_struct *uc, const char *cpu_model)
     env = &cpu->env;
     env->cpu_model = def;
 
-    cpu_mips_realize_env(env);
-
     object_property_set_bool(uc, OBJECT(cpu), true, "realized", NULL);
 
     return cpu;