diff --git a/qemu/target/i386/translate.c b/qemu/target/i386/translate.c index 699a7f66..87f76216 100644 --- a/qemu/target/i386/translate.c +++ b/qemu/target/i386/translate.c @@ -123,6 +123,7 @@ typedef struct DisasContext { /* TCG local register indexes (only used inside old micro ops) */ TCGv tmp0; TCGv tmp4; + TCGv_ptr ptr0; sigjmp_buf jmpbuf; struct uc_struct *uc; @@ -3495,7 +3496,6 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, TCGMemOp ot; TCGContext *tcg_ctx = s->uc->tcg_ctx; TCGv_ptr cpu_env = tcg_ctx->cpu_env; - TCGv_ptr cpu_ptr0 = tcg_ctx->cpu_ptr0; TCGv_ptr cpu_ptr1 = tcg_ctx->cpu_ptr1; TCGv_i32 cpu_tmp2_i32 = tcg_ctx->cpu_tmp2_i32; TCGv_i32 cpu_tmp3_i32 = tcg_ctx->cpu_tmp3_i32; @@ -3615,27 +3615,27 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, #endif { gen_ldst_modrm(env, s, modrm, MO_32, OR_TMP0, 0); - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, offsetof(CPUX86State,fpregs[reg].mmx)); tcg_gen_trunc_tl_i32(tcg_ctx, cpu_tmp2_i32, s->T0); - gen_helper_movl_mm_T0_mmx(tcg_ctx, cpu_ptr0, cpu_tmp2_i32); + gen_helper_movl_mm_T0_mmx(tcg_ctx, s->ptr0, cpu_tmp2_i32); } break; case 0x16e: /* movd xmm, ea */ #ifdef TARGET_X86_64 if (s->dflag == MO_64) { gen_ldst_modrm(env, s, modrm, MO_64, OR_TMP0, 0); - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[reg])); - gen_helper_movq_mm_T0_xmm(tcg_ctx, cpu_ptr0, s->T0); + gen_helper_movq_mm_T0_xmm(tcg_ctx, s->ptr0, s->T0); } else #endif { gen_ldst_modrm(env, s, modrm, MO_32, OR_TMP0, 0); - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[reg])); tcg_gen_trunc_tl_i32(tcg_ctx, cpu_tmp2_i32, s->T0); - gen_helper_movl_mm_T0_xmm(tcg_ctx, cpu_ptr0, cpu_tmp2_i32); + gen_helper_movl_mm_T0_xmm(tcg_ctx, s->ptr0, cpu_tmp2_i32); } break; case 0x6f: /* movq mm, ea */ @@ -3774,14 +3774,14 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, goto illegal_op; field_length = x86_ldub_code(env, s) & 0x3F; bit_index = x86_ldub_code(env, s) & 0x3F; - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[reg])); if (b1 == 1) - gen_helper_extrq_i(tcg_ctx, cpu_env, cpu_ptr0, + gen_helper_extrq_i(tcg_ctx, cpu_env, s->ptr0, tcg_const_i32(tcg_ctx, bit_index), tcg_const_i32(tcg_ctx, field_length)); else - gen_helper_insertq_i(tcg_ctx, cpu_env, cpu_ptr0, + gen_helper_insertq_i(tcg_ctx, cpu_env, s->ptr0, tcg_const_i32(tcg_ctx, bit_index), tcg_const_i32(tcg_ctx, field_length)); } @@ -3928,22 +3928,22 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, rm = (modrm & 7); op2_offset = offsetof(CPUX86State,fpregs[rm].mmx); } - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, op2_offset); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, op2_offset); tcg_gen_addi_ptr(tcg_ctx, cpu_ptr1, cpu_env, op1_offset); - sse_fn_epp(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1); + sse_fn_epp(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1); break; case 0x050: /* movmskps */ rm = (modrm & 7) | REX_B(s); - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm])); - gen_helper_movmskps(tcg_ctx, cpu_tmp2_i32, cpu_env, cpu_ptr0); + gen_helper_movmskps(tcg_ctx, cpu_tmp2_i32, cpu_env, s->ptr0); tcg_gen_extu_i32_tl(tcg_ctx, cpu_regs[reg], cpu_tmp2_i32); break; case 0x150: /* movmskpd */ rm = (modrm & 7) | REX_B(s); - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm])); - gen_helper_movmskpd(tcg_ctx, cpu_tmp2_i32, cpu_env, cpu_ptr0); + gen_helper_movmskpd(tcg_ctx, cpu_tmp2_i32, cpu_env, s->ptr0); tcg_gen_extu_i32_tl(tcg_ctx, cpu_regs[reg], cpu_tmp2_i32); break; case 0x02a: /* cvtpi2ps */ @@ -3958,15 +3958,15 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, op2_offset = offsetof(CPUX86State,fpregs[rm].mmx); } op1_offset = offsetof(CPUX86State,xmm_regs[reg]); - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, op1_offset); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(tcg_ctx, cpu_ptr1, cpu_env, op2_offset); switch(b >> 8) { case 0x0: - gen_helper_cvtpi2ps(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1); + gen_helper_cvtpi2ps(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1); break; default: case 0x1: - gen_helper_cvtpi2pd(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1); + gen_helper_cvtpi2pd(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1); break; } break; @@ -3975,15 +3975,15 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, ot = mo_64_32(s->dflag); gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0); op1_offset = offsetof(CPUX86State,xmm_regs[reg]); - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, op1_offset); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, op1_offset); if (ot == MO_32) { SSEFunc_0_epi sse_fn_epi = sse_op_table3ai[(b >> 8) & 1]; tcg_gen_trunc_tl_i32(tcg_ctx, cpu_tmp2_i32, s->T0); - sse_fn_epi(tcg_ctx, cpu_env, cpu_ptr0, cpu_tmp2_i32); + sse_fn_epi(tcg_ctx, cpu_env, s->ptr0, cpu_tmp2_i32); } else { #ifdef TARGET_X86_64 SSEFunc_0_epl sse_fn_epl = sse_op_table3aq[(b >> 8) & 1]; - sse_fn_epl(tcg_ctx, cpu_env, cpu_ptr0, s->T0); + sse_fn_epl(tcg_ctx, cpu_env, s->ptr0, s->T0); #else goto illegal_op; #endif @@ -4003,20 +4003,20 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, op2_offset = offsetof(CPUX86State,xmm_regs[rm]); } op1_offset = offsetof(CPUX86State,fpregs[reg & 7].mmx); - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, op1_offset); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(tcg_ctx, cpu_ptr1, cpu_env, op2_offset); switch(b) { case 0x02c: - gen_helper_cvttps2pi(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1); + gen_helper_cvttps2pi(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1); break; case 0x12c: - gen_helper_cvttpd2pi(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1); + gen_helper_cvttpd2pi(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1); break; case 0x02d: - gen_helper_cvtps2pi(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1); + gen_helper_cvtps2pi(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1); break; case 0x12d: - gen_helper_cvtpd2pi(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1); + gen_helper_cvtpd2pi(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1); break; } break; @@ -4038,17 +4038,17 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, rm = (modrm & 7) | REX_B(s); op2_offset = offsetof(CPUX86State,xmm_regs[rm]); } - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, op2_offset); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, op2_offset); if (ot == MO_32) { SSEFunc_i_ep sse_fn_i_ep = sse_op_table3bi[((b >> 7) & 2) | (b & 1)]; - sse_fn_i_ep(tcg_ctx, cpu_tmp2_i32, cpu_env, cpu_ptr0); + sse_fn_i_ep(tcg_ctx, cpu_tmp2_i32, cpu_env, s->ptr0); tcg_gen_extu_i32_tl(tcg_ctx, s->T0, cpu_tmp2_i32); } else { #ifdef TARGET_X86_64 SSEFunc_l_ep sse_fn_l_ep = sse_op_table3bq[((b >> 7) & 2) | (b & 1)]; - sse_fn_l_ep(tcg_ctx, s->T0, cpu_env, cpu_ptr0); + sse_fn_l_ep(tcg_ctx, s->T0, cpu_env, s->ptr0); #else goto illegal_op; #endif @@ -4121,12 +4121,12 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, goto illegal_op; if (b1) { rm = (modrm & 7) | REX_B(s); - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm])); - gen_helper_pmovmskb_xmm(tcg_ctx, cpu_tmp2_i32, cpu_env, cpu_ptr0); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm])); + gen_helper_pmovmskb_xmm(tcg_ctx, cpu_tmp2_i32, cpu_env, s->ptr0); } else { rm = (modrm & 7); - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, offsetof(CPUX86State,fpregs[rm].mmx)); - gen_helper_pmovmskb_mmx(tcg_ctx, cpu_tmp2_i32, cpu_env, cpu_ptr0); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, offsetof(CPUX86State,fpregs[rm].mmx)); + gen_helper_pmovmskb_mmx(tcg_ctx, cpu_tmp2_i32, cpu_env, s->ptr0); } reg = ((modrm >> 3) & 7) | rex_r; tcg_gen_extu_i32_tl(tcg_ctx, cpu_regs[reg], cpu_tmp2_i32); @@ -4201,9 +4201,9 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, goto unknown_op; } - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, op1_offset); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(tcg_ctx, cpu_ptr1, cpu_env, op2_offset); - sse_fn_epp(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1); + sse_fn_epp(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1); if (b == 0x17) { set_cc_op(s, CC_OP_EFLAGS); @@ -4750,9 +4750,9 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, } } - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, op1_offset); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(tcg_ctx, cpu_ptr1, cpu_env, op2_offset); - sse_fn_eppi(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1, tcg_const_i32(tcg_ctx, val)); + sse_fn_eppi(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1, tcg_const_i32(tcg_ctx, val)); break; case 0x33a: @@ -4870,18 +4870,18 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, if (!(s->cpuid_ext2_features & CPUID_EXT2_3DNOW)) { goto illegal_op; } - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, op1_offset); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(tcg_ctx, cpu_ptr1, cpu_env, op2_offset); - sse_fn_epp(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1); + sse_fn_epp(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1); break; case 0x70: /* pshufx insn */ case 0xc6: /* pshufx insn */ val = x86_ldub_code(env, s); - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, op1_offset); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(tcg_ctx, cpu_ptr1, cpu_env, op2_offset); /* XXX: introduce a new table? */ sse_fn_ppi = (SSEFunc_0_ppi)sse_fn_epp; - sse_fn_ppi(tcg_ctx, cpu_ptr0, cpu_ptr1, tcg_const_i32(tcg_ctx, val)); + sse_fn_ppi(tcg_ctx, s->ptr0, cpu_ptr1, tcg_const_i32(tcg_ctx, val)); break; case 0xc2: /* compare insns */ @@ -4890,9 +4890,9 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, goto unknown_op; sse_fn_epp = sse_op_table4[val][b1]; - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, op1_offset); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(tcg_ctx, cpu_ptr1, cpu_env, op2_offset); - sse_fn_epp(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1); + sse_fn_epp(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1); break; case 0xf7: /* maskmov : we must prepare A0 */ @@ -4902,16 +4902,16 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b, gen_extu(s, s->aflag, s->A0); gen_add_A0_ds_seg(s); - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, op1_offset); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(tcg_ctx, cpu_ptr1, cpu_env, op2_offset); /* XXX: introduce a new table? */ sse_fn_eppt = (SSEFunc_0_eppt)sse_fn_epp; - sse_fn_eppt(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1, s->A0); + sse_fn_eppt(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1, s->A0); break; default: - tcg_gen_addi_ptr(tcg_ctx, cpu_ptr0, cpu_env, op1_offset); + tcg_gen_addi_ptr(tcg_ctx, s->ptr0, cpu_env, op1_offset); tcg_gen_addi_ptr(tcg_ctx, cpu_ptr1, cpu_env, op2_offset); - sse_fn_epp(tcg_ctx, cpu_env, cpu_ptr0, cpu_ptr1); + sse_fn_epp(tcg_ctx, cpu_env, s->ptr0, cpu_ptr1); break; } if (b == 0x2e || b == 0x2f) { @@ -9137,7 +9137,7 @@ static void i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu) tcg_ctx->cpu_tmp1_i64 = tcg_temp_new_i64(tcg_ctx); tcg_ctx->cpu_tmp2_i32 = tcg_temp_new_i32(tcg_ctx); tcg_ctx->cpu_tmp3_i32 = tcg_temp_new_i32(tcg_ctx); - tcg_ctx->cpu_ptr0 = tcg_temp_new_ptr(tcg_ctx); + dc->ptr0 = tcg_temp_new_ptr(tcg_ctx); tcg_ctx->cpu_ptr1 = tcg_temp_new_ptr(tcg_ctx); dc->cc_srcT = tcg_temp_local_new(tcg_ctx); diff --git a/qemu/tcg/tcg.h b/qemu/tcg/tcg.h index 6046ca47..5f366aec 100644 --- a/qemu/tcg/tcg.h +++ b/qemu/tcg/tcg.h @@ -827,7 +827,7 @@ struct TCGContext { TCGv cpu_cc_src2; /* qemu/target-i386/translate.c: local register indexes (only used inside old micro ops) */ - TCGv_ptr cpu_ptr0, cpu_ptr1; + TCGv_ptr cpu_ptr1; TCGv_i32 cpu_tmp2_i32, cpu_tmp3_i32; TCGv_i64 cpu_tmp1_i64;