From 3d5b54cf4b1eaed00823a2cc26213e54bdc325ef Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Tue, 20 Feb 2018 11:39:36 -0500 Subject: [PATCH] target-arm: Fix IL bit reported for Thumb VFP and Neon traps All Thumb Neon and VFP instructions are 32 bits, so the IL bit in the syndrome register should be set. Pass false to the syn_* function's is_16bit argument rather than s->thumb so we report the correct IL bit. Backports commit 7d197d2db5e99e4c8b20f6771ddc7303acaa1c89 from qemu --- qemu/target-arm/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/qemu/target-arm/translate.c b/qemu/target-arm/translate.c index da76befb..e85bd2cf 100644 --- a/qemu/target-arm/translate.c +++ b/qemu/target-arm/translate.c @@ -3181,7 +3181,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) */ if (s->fp_excp_el) { gen_exception_insn(s, 4, EXCP_UDEF, - syn_fp_access_trap(1, 0xe, s->thumb), s->fp_excp_el); + syn_fp_access_trap(1, 0xe, false), s->fp_excp_el); return 0; } @@ -4513,7 +4513,7 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn) */ if (s->fp_excp_el) { gen_exception_insn(s, 4, EXCP_UDEF, - syn_fp_access_trap(1, 0xe, s->thumb), s->fp_excp_el); + syn_fp_access_trap(1, 0xe, false), s->fp_excp_el); return 0; } @@ -5266,7 +5266,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) */ if (s->fp_excp_el) { gen_exception_insn(s, 4, EXCP_UDEF, - syn_fp_access_trap(1, 0xe, s->thumb), s->fp_excp_el); + syn_fp_access_trap(1, 0xe, false), s->fp_excp_el); return 0; }