From 39ff690eff599247ecd855e868a2ddc77159c48f Mon Sep 17 00:00:00 2001 From: Alistair Francis Date: Thu, 25 Feb 2021 11:55:51 -0500 Subject: [PATCH] target/riscv: Report errors validating 2nd-stage PTEs Backports commit 88914473e748db20d8e18b9735f647a683319fa6 from qemu --- qemu/target/riscv/cpu_helper.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/qemu/target/riscv/cpu_helper.c b/qemu/target/riscv/cpu_helper.c index 59df5a8b..3e35b595 100644 --- a/qemu/target/riscv/cpu_helper.c +++ b/qemu/target/riscv/cpu_helper.c @@ -429,8 +429,13 @@ restart: hwaddr vbase; /* Do the second stage translation on the base PTE address. */ - get_physical_address(env, &vbase, &vbase_prot, base, MMU_DATA_LOAD, - mmu_idx, false, true); + int vbase_ret = get_physical_address(env, &vbase, &vbase_prot, + base, MMU_DATA_LOAD, + mmu_idx, false, true); + + if (vbase_ret != TRANSLATE_SUCCESS) { + return vbase_ret; + } pte_addr = vbase + idx * ptesize; } else {