From 2e8c6adc4b5783dfd21564b6122fe9b08d3dea12 Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Mon, 19 Feb 2018 00:40:17 -0500 Subject: [PATCH] target-mips: silence NaNs for cvt.s.d and cvt.d.s cvt.s.d and cvt.d.s are FP operations and thus need to convert input sNaN into corresponding qNaN. Explicitely use the floatXX_maybe_silence_nan functions for that as the floatXX_to_floatXX functions do not do that. Backports commit 1aa56f6ee7d2375b0734e98ba69cc41416894bbc from qemu --- qemu/target-mips/op_helper.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qemu/target-mips/op_helper.c b/qemu/target-mips/op_helper.c index b7e00c92..f2259a4e 100644 --- a/qemu/target-mips/op_helper.c +++ b/qemu/target-mips/op_helper.c @@ -2548,6 +2548,7 @@ uint64_t helper_float_cvtd_s(CPUMIPSState *env, uint32_t fst0) uint64_t fdt2; fdt2 = float32_to_float64(fst0, &env->active_fpu.fp_status); + fdt2 = float64_maybe_silence_nan(fdt2); update_fcr31(env, GETPC()); return fdt2; } @@ -2637,6 +2638,7 @@ uint32_t helper_float_cvts_d(CPUMIPSState *env, uint64_t fdt0) uint32_t fst2; fst2 = float64_to_float32(fdt0, &env->active_fpu.fp_status); + fst2 = float32_maybe_silence_nan(fst2); update_fcr31(env, GETPC()); return fst2; }