From 21375463ea04cd0e2cf9af62b06414e80d4982ad Mon Sep 17 00:00:00 2001
From: Claudio Fontana <cfontana@suse.de>
Date: Thu, 4 Mar 2021 16:40:24 -0500
Subject: [PATCH] target/riscv: remove CONFIG_TCG, as it is always TCG

for now only TCG is allowed as an accelerator for riscv,
so remove the CONFIG_TCG use.

Backports 6a3d2e7c0654c3fb2d3368d05363d0635e8bb8ff
---
 qemu/target/riscv/cpu.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/qemu/target/riscv/cpu.c b/qemu/target/riscv/cpu.c
index 8017dc4a..9ecc7cbe 100644
--- a/qemu/target/riscv/cpu.c
+++ b/qemu/target/riscv/cpu.c
@@ -372,10 +372,8 @@ static void riscv_cpu_class_init(struct uc_struct *uc, ObjectClass *oc, void *da
     cc->do_unaligned_access = riscv_cpu_do_unaligned_access;
     cc->get_phys_page_debug = riscv_cpu_get_phys_page_debug;
 #endif
-#ifdef CONFIG_TCG
     cc->tcg_ops.initialize = riscv_translate_init;
     cc->tlb_fill = riscv_cpu_tlb_fill;
-#endif
     /* For now, mark unmigratable: */
     //cc->vmsd = &vmstate_riscv_cpu;
 }