From 158bfc109a753588a20a24ab0c318aedc832509e Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Mon, 26 Feb 2018 08:11:49 -0500 Subject: [PATCH] target-arm: Implement dummy MDCCINT_EL1 MDCCINT_EL1 is part of the DCC debugger communication channel between the CPU and an attached external debugger. QEMU doesn't implement this, but since Linux may try to access this register we need to provide at least a dummy implementation. Backports commit 5dbdc4342f479d799a1970dd5fd22e64c9dcd50d from qemu --- qemu/target-arm/helper.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/qemu/target-arm/helper.c b/qemu/target-arm/helper.c index ebb4ab72..86578ba0 100644 --- a/qemu/target-arm/helper.c +++ b/qemu/target-arm/helper.c @@ -3532,6 +3532,13 @@ static const ARMCPRegInfo debug_cp_reginfo[] = { { "DBGVCR", 14,0,7, 0,0,0, 0, ARM_CP_NOP, PL1_RW, 0, NULL, 0, 0, {0, 0}, access_tda }, + /* Dummy MDCCINT_EL1, since we don't implement the Debug Communications + * Channel but Linux may try to access this register. The 32-bit + * alias is DBGDCCINT. + */ + { "MDCCINT_EL1", 14,0,2, 2,0,0, ARM_CP_STATE_BOTH, ARM_CP_NOP, + PL1_RW, 0, NULL, 0, 0, {0, 0}, + access_tda }, REGINFO_SENTINEL };