From 0be85bf91ab3aa7f64ff8f4aba98f16228e1f421 Mon Sep 17 00:00:00 2001 From: Mark Cave-Ayland Date: Fri, 12 Mar 2021 14:29:28 -0500 Subject: [PATCH] target/m68k: don't set SSW ATC bit for physical bus errors If a NuBus slot doesn't contain a card, the Quadra hardware generates a physical bus error if the CPU attempts to access the slot address space. Both Linux and MacOS use a separate bus error handler during NuBus accesses in order to detect and recover when addressing empty slots. According to the MC68040 users manual the ATC bit of the SSW is used to distinguish between ATC faults and physical bus errors. MacOS specifically checks the stack frame generated by a NuBus error and panics if the SSW ATC bit is set. Update m68k_cpu_transaction_failed() so that the SSW ATC bit is not set if the memory API returns MEMTX_DECODE_ERROR which will be used to indicate that an access to an empty NuBus slot occurred. Backports d6cbd8f7a19e6f0fd22a598aad992c4913f481f2 --- qemu/target/m68k/op_helper.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/qemu/target/m68k/op_helper.c b/qemu/target/m68k/op_helper.c index 2735d5c0..6d206bad 100644 --- a/qemu/target/m68k/op_helper.c +++ b/qemu/target/m68k/op_helper.c @@ -459,7 +459,17 @@ void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, if (m68k_feature(env, M68K_FEATURE_M68040)) { env->mmu.mmusr = 0; - env->mmu.ssw |= M68K_ATC_040; + + /* + * According to the MC68040 users manual the ATC bit of the SSW is + * used to distinguish between ATC faults and physical bus errors. + * In the case of a bus error e.g. during nubus read from an empty + * slot this bit should not be set + */ + if (response != MEMTX_DECODE_ERROR) { + env->mmu.ssw |= M68K_ATC_040; + } + /* FIXME: manage MMU table access error */ env->mmu.ssw &= ~M68K_TM_040; if (env->sr & SR_S) { /* SUPERVISOR */