diff --git a/qemu/target-i386/translate.c b/qemu/target-i386/translate.c
index bbcec90b..75f88c85 100644
--- a/qemu/target-i386/translate.c
+++ b/qemu/target-i386/translate.c
@@ -1562,21 +1562,23 @@ static void gen_inc(DisasContext *s, TCGMemOp ot, int d, int c)
     TCGv cpu_cc_src = tcg_ctx->cpu_cc_src;
     TCGv cpu_T0 = tcg_ctx->cpu_T0;
 
-    if (d != OR_TMP0) {
-        gen_op_mov_v_reg(tcg_ctx, ot, cpu_T0, d);
+    if (s->prefix & PREFIX_LOCK) {
+        tcg_gen_movi_tl(tcg_ctx, cpu_T0, c > 0 ? 1 : -1);
+        tcg_gen_atomic_add_fetch_tl(tcg_ctx, cpu_T0, cpu_A0, cpu_T0,
+                                    s->mem_index, ot | MO_LE);
     } else {
-        gen_op_ld_v(s, ot, cpu_T0, cpu_A0);
+        if (d != OR_TMP0) {
+            gen_op_mov_v_reg(tcg_ctx, ot, cpu_T0, d);
+        } else {
+            gen_op_ld_v(s, ot, cpu_T0, cpu_A0);
+        }
+        tcg_gen_addi_tl(tcg_ctx, cpu_T0, cpu_T0, (c > 0 ? 1 : -1));
+        gen_op_st_rm_T0_A0(s, ot, d);
     }
+
     gen_compute_eflags_c(s, cpu_cc_src);
-    if (c > 0) {
-        tcg_gen_addi_tl(tcg_ctx, cpu_T0, cpu_T0, 1);
-        set_cc_op(s, CC_OP_INCB + ot);
-    } else {
-        tcg_gen_addi_tl(tcg_ctx, cpu_T0, cpu_T0, -1);
-        set_cc_op(s, CC_OP_DECB + ot);
-    }
-    gen_op_st_rm_T0_A0(s, ot, d);
     tcg_gen_mov_tl(tcg_ctx, cpu_cc_dst, cpu_T0);
+    set_cc_op(s, (c > 0 ? CC_OP_INCB : CC_OP_DECB) + ot);
 }
 
 static void gen_shift_flags(DisasContext *s, TCGMemOp ot, TCGv result,