mirror of
https://github.com/yuzu-mirror/oaknut.git
synced 2026-04-21 06:03:37 +00:00
Minor fixes
This commit is contained in:
Merry
parent
de827b00c8
commit
b78ce55fb6
5 changed files with 95 additions and 38 deletions
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@ -32,10 +32,18 @@ void ADD(WRegWsp wd, WRegWsp wn, AddSubImm imm)
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{
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emit<"000100010siiiiiiiiiiiinnnnnddddd", "d", "n", "si">(wd, wn, imm);
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}
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void ADD(WRegWsp wd, WRegWsp wn, Imm<12> imm, LslSymbol, ImmChoice<0, 12> shift_amount)
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{
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ADD(wd, wn, AddSubImm{imm.value(), static_cast<AddSubImmShift>(shift_amount.m_encoded)});
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}
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void ADD(XRegSp xd, XRegSp xn, AddSubImm imm)
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{
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emit<"100100010siiiiiiiiiiiinnnnnddddd", "d", "n", "si">(xd, xn, imm);
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}
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void ADD(XRegSp xd, XRegSp xn, Imm<12> imm, LslSymbol, ImmChoice<0, 12> shift_amount)
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{
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ADD(xd, xn, AddSubImm{imm.value(), static_cast<AddSubImmShift>(shift_amount.m_encoded)});
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}
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void ADD(WReg wd, WReg wn, WReg wm, AddSubShift shift = AddSubShift::LSL, Imm<5> shift_amount = 0)
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{
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emit<"00001011ss0mmmmmiiiiiinnnnnddddd", "d", "n", "m", "s", "i">(wd, wn, wm, shift, shift_amount);
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@ -59,10 +67,18 @@ void ADDS(WReg wd, WRegWsp wn, AddSubImm imm)
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{
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emit<"001100010siiiiiiiiiiiinnnnnddddd", "d", "n", "si">(wd, wn, imm);
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}
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void ADDS(WReg wd, WRegWsp wn, Imm<12> imm, LslSymbol, ImmChoice<0, 12> shift_amount)
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{
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ADDS(wd, wn, AddSubImm{imm.value(), static_cast<AddSubImmShift>(shift_amount.m_encoded)});
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}
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void ADDS(XReg xd, XRegSp xn, AddSubImm imm)
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{
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emit<"101100010siiiiiiiiiiiinnnnnddddd", "d", "n", "si">(xd, xn, imm);
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}
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void ADDS(XReg xd, XRegSp xn, Imm<12> imm, LslSymbol, ImmChoice<0, 12> shift_amount)
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{
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ADDS(xd, xn, AddSubImm{imm.value(), static_cast<AddSubImmShift>(shift_amount.m_encoded)});
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}
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void ADDS(WReg wd, WReg wn, WReg wm, AddSubShift shift = AddSubShift::LSL, Imm<5> shift_amount = 0)
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{
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emit<"00101011ss0mmmmmiiiiiinnnnnddddd", "d", "n", "m", "s", "i">(wd, wn, wm, shift, shift_amount);
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@ -171,13 +187,13 @@ void BFXIL(WReg wd, WReg wn, Imm<5> lsb, Imm<5> width)
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{
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if (width.value() == 0 || width.value() > (32 - lsb.value()))
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throw "invalid width";
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emit<"0011001100rrrrrrssssssnnnnnddddd", "d", "n", "r", "s">(wd, wn, (-lsb.value()) & 31, width.value() - 1);
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emit<"0011001100rrrrrrssssssnnnnnddddd", "d", "n", "r", "s">(wd, wn, lsb.value(), lsb.value() + width.value() - 1);
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}
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void BFXIL(XReg xd, XReg xn, Imm<6> lsb, Imm<6> width)
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{
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if (width.value() == 0 || width.value() > (64 - lsb.value()))
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throw "invalid width";
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emit<"1011001101rrrrrrssssssnnnnnddddd", "d", "n", "r", "s">(xd, xn, (-lsb.value()) & 63, width.value() - 1);
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emit<"1011001101rrrrrrssssssnnnnnddddd", "d", "n", "r", "s">(xd, xn, lsb.value(), lsb.value() + width.value() - 1);
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}
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void BIC(WReg wd, WReg wn, WReg wm, LogShift shift = LogShift::LSL, Imm<5> shift_amount = 0)
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{
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@ -261,27 +277,27 @@ void CCMP(XReg xn, XReg xm, Imm<4> nzcv, Cond cond)
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}
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void CINC(WReg wd, WReg wn, Cond cond)
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{
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if (cond != Cond::AL && cond != Cond::NV)
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if (cond == Cond::AL || cond == Cond::NV)
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throw "invalid Cond";
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emit<"00011010100mmmmmcccc01nnnnnddddd", "d", "n", "c">(wd, wn, invert(cond));
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emit<"00011010100mmmmmcccc01nnnnnddddd", "d", "n", "m", "c">(wd, wn, wn, invert(cond));
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}
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void CINC(XReg xd, XReg xn, Cond cond)
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{
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if (cond != Cond::AL && cond != Cond::NV)
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if (cond == Cond::AL || cond == Cond::NV)
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throw "invalid Cond";
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emit<"10011010100mmmmmcccc01nnnnnddddd", "d", "n", "c">(xd, xn, invert(cond));
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emit<"10011010100mmmmmcccc01nnnnnddddd", "d", "n", "m", "c">(xd, xn, xn, invert(cond));
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}
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void CINV(WReg wd, WReg wn, Cond cond)
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{
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if (cond != Cond::AL && cond != Cond::NV)
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if (cond == Cond::AL || cond == Cond::NV)
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throw "invalid Cond";
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emit<"01011010100mmmmmcccc00nnnnnddddd", "d", "n", "c">(wd, wn, invert(cond));
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emit<"01011010100mmmmmcccc00nnnnnddddd", "d", "n", "m", "c">(wd, wn, wn, invert(cond));
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}
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void CINV(XReg xd, XReg xn, Cond cond)
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{
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if (cond != Cond::AL && cond != Cond::NV)
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if (cond == Cond::AL || cond == Cond::NV)
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throw "invalid Cond";
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emit<"11011010100mmmmmcccc00nnnnnddddd", "d", "n", "c">(xd, xn, invert(cond));
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emit<"11011010100mmmmmcccc00nnnnnddddd", "d", "n", "m", "c">(xd, xn, xn, invert(cond));
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}
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void CLREX(Imm<4> imm = 15)
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{
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@ -318,10 +334,18 @@ void CMN(WRegWsp wn, AddSubImm imm)
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{
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emit<"001100010siiiiiiiiiiiinnnnn11111", "n", "si">(wn, imm);
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}
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void CMN(WRegWsp wn, Imm<12> imm, LslSymbol, ImmChoice<0, 12> shift_amount)
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{
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CMN(wn, AddSubImm{imm.value(), static_cast<AddSubImmShift>(shift_amount.m_encoded)});
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}
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void CMN(XRegSp xn, AddSubImm imm)
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{
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emit<"101100010siiiiiiiiiiiinnnnn11111", "n", "si">(xn, imm);
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}
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void CMN(XRegSp xn, Imm<12> imm, LslSymbol, ImmChoice<0, 12> shift_amount)
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{
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CMN(xn, AddSubImm{imm.value(), static_cast<AddSubImmShift>(shift_amount.m_encoded)});
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}
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void CMN(WReg wn, WReg wm, AddSubShift shift = AddSubShift::LSL, Imm<5> shift_amount = 0)
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{
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emit<"00101011ss0mmmmmiiiiiinnnnn11111", "n", "m", "s", "i">(wn, wm, shift, shift_amount);
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@ -345,10 +369,18 @@ void CMP(WRegWsp wn, AddSubImm imm)
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{
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emit<"011100010siiiiiiiiiiiinnnnn11111", "n", "si">(wn, imm);
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}
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void CMP(WRegWsp wn, Imm<12> imm, LslSymbol, ImmChoice<0, 12> shift_amount)
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{
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CMP(wn, AddSubImm{imm.value(), static_cast<AddSubImmShift>(shift_amount.m_encoded)});
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}
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void CMP(XRegSp xn, AddSubImm imm)
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{
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emit<"111100010siiiiiiiiiiiinnnnn11111", "n", "si">(xn, imm);
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}
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void CMP(XRegSp xn, Imm<12> imm, LslSymbol, ImmChoice<0, 12> shift_amount)
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{
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CMP(xn, AddSubImm{imm.value(), static_cast<AddSubImmShift>(shift_amount.m_encoded)});
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}
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void CMP(WReg wn, WReg wm, AddSubShift shift = AddSubShift::LSL, Imm<5> shift_amount = 0)
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{
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emit<"01101011ss0mmmmmiiiiiinnnnn11111", "n", "m", "s", "i">(wn, wm, shift, shift_amount);
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@ -359,15 +391,15 @@ void CMP(XReg xn, XReg xm, AddSubShift shift = AddSubShift::LSL, Imm<6> shift_am
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}
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void CNEG(WReg wd, WReg wn, Cond cond)
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{
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if (cond != Cond::AL && cond != Cond::NV)
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if (cond == Cond::AL || cond == Cond::NV)
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throw "invalid Cond";
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emit<"01011010100mmmmmcccc01nnnnnddddd", "d", "n", "c">(wd, wn, invert(cond));
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emit<"01011010100mmmmmcccc01nnnnnddddd", "d", "n", "m", "c">(wd, wn, wn, invert(cond));
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}
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void CNEG(XReg xd, XReg xn, Cond cond)
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{
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if (cond != Cond::AL && cond != Cond::NV)
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if (cond == Cond::AL || cond == Cond::NV)
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throw "invalid Cond";
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emit<"11011010100mmmmmcccc01nnnnnddddd", "d", "n", "c">(xd, xn, invert(cond));
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emit<"11011010100mmmmmcccc01nnnnnddddd", "d", "n", "m", "c">(xd, xn, xn, invert(cond));
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}
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void CRC32B(WReg wd, WReg wn, WReg wm)
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{
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@ -415,25 +447,25 @@ void CSEL(XReg xd, XReg xn, XReg xm, Cond cond)
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}
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void CSET(WReg wd, Cond cond)
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{
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if (cond != Cond::AL && cond != Cond::NV)
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if (cond == Cond::AL || cond == Cond::NV)
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throw "invalid Cond";
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emit<"0001101010011111cccc0111111ddddd", "d", "c">(wd, invert(cond));
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}
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void CSET(XReg xd, Cond cond)
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{
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if (cond != Cond::AL && cond != Cond::NV)
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if (cond == Cond::AL || cond == Cond::NV)
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throw "invalid Cond";
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emit<"1001101010011111cccc0111111ddddd", "d", "c">(xd, invert(cond));
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}
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void CSETM(WReg wd, Cond cond)
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{
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if (cond != Cond::AL && cond != Cond::NV)
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if (cond == Cond::AL || cond == Cond::NV)
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throw "invalid Cond";
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emit<"0101101010011111cccc0011111ddddd", "d", "c">(wd, invert(cond));
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}
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void CSETM(XReg xd, Cond cond)
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{
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if (cond != Cond::AL && cond != Cond::NV)
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if (cond == Cond::AL || cond == Cond::NV)
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throw "invalid Cond";
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emit<"1101101010011111cccc0011111ddddd", "d", "c">(xd, invert(cond));
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}
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@ -1219,13 +1251,13 @@ void SBFX(WReg wd, WReg wn, Imm<5> lsb, Imm<5> width)
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{
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if (width.value() == 0 || width.value() > (32 - lsb.value()))
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throw "invalid width";
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emit<"0001001100rrrrrrssssssnnnnnddddd", "d", "n", "r", "s">(wd, wn, (-lsb.value()) & 31, width.value() - 1);
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emit<"0001001100rrrrrrssssssnnnnnddddd", "d", "n", "r", "s">(wd, wn, lsb.value(), lsb.value() + width.value() - 1);
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}
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void SBFX(XReg xd, XReg xn, Imm<6> lsb, Imm<6> width)
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{
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if (width.value() == 0 || width.value() > (64 - lsb.value()))
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throw "invalid width";
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emit<"1001001101rrrrrrssssssnnnnnddddd", "d", "n", "r", "s">(xd, xn, (-lsb.value()) & 63, width.value() - 1);
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emit<"1001001101rrrrrrssssssnnnnnddddd", "d", "n", "r", "s">(xd, xn, lsb.value(), lsb.value() + width.value() - 1);
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}
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void SDIV(WReg wd, WReg wn, WReg wm)
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{
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@ -1482,10 +1514,18 @@ void SUB(WRegWsp wd, WRegWsp wn, AddSubImm imm)
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{
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emit<"010100010siiiiiiiiiiiinnnnnddddd", "d", "n", "si">(wd, wn, imm);
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}
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void SUB(WRegWsp wd, WRegWsp wn, Imm<12> imm, LslSymbol, ImmChoice<0, 12> shift_amount)
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{
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SUB(wd, wn, AddSubImm{imm.value(), static_cast<AddSubImmShift>(shift_amount.m_encoded)});
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}
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void SUB(XRegSp xd, XRegSp xn, AddSubImm imm)
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{
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emit<"110100010siiiiiiiiiiiinnnnnddddd", "d", "n", "si">(xd, xn, imm);
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}
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void SUB(XRegSp xd, XRegSp xn, Imm<12> imm, LslSymbol, ImmChoice<0, 12> shift_amount)
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{
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SUB(xd, xn, AddSubImm{imm.value(), static_cast<AddSubImmShift>(shift_amount.m_encoded)});
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}
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void SUB(WReg wd, WReg wn, WReg wm, AddSubShift shift = AddSubShift::LSL, Imm<5> shift_amount = 0)
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{
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emit<"01001011ss0mmmmmiiiiiinnnnnddddd", "d", "n", "m", "s", "i">(wd, wn, wm, shift, shift_amount);
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@ -1509,10 +1549,18 @@ void SUBS(WReg wd, WRegWsp wn, AddSubImm imm)
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{
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emit<"011100010siiiiiiiiiiiinnnnnddddd", "d", "n", "si">(wd, wn, imm);
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}
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void SUBS(WReg wd, WRegWsp wn, Imm<12> imm, LslSymbol, ImmChoice<0, 12> shift_amount)
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{
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SUBS(wd, wn, AddSubImm{imm.value(), static_cast<AddSubImmShift>(shift_amount.m_encoded)});
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}
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void SUBS(XReg xd, XRegSp xn, AddSubImm imm)
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{
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emit<"111100010siiiiiiiiiiiinnnnnddddd", "d", "n", "si">(xd, xn, imm);
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}
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void SUBS(XReg xd, XRegSp xn, Imm<12> imm, LslSymbol, ImmChoice<0, 12> shift_amount)
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{
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SUBS(xd, xn, AddSubImm{imm.value(), static_cast<AddSubImmShift>(shift_amount.m_encoded)});
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}
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void SUBS(WReg wd, WReg wn, WReg wm, AddSubShift shift = AddSubShift::LSL, Imm<5> shift_amount = 0)
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{
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emit<"01101011ss0mmmmmiiiiiinnnnnddddd", "d", "n", "m", "s", "i">(wd, wn, wm, shift, shift_amount);
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@ -1599,13 +1647,13 @@ void UBFX(WReg wd, WReg wn, Imm<5> lsb, Imm<5> width)
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{
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if (width.value() == 0 || width.value() > (32 - lsb.value()))
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throw "invalid width";
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emit<"0101001100rrrrrrssssssnnnnnddddd", "d", "n", "r", "s">(wd, wn, (-lsb.value()) & 31, width.value() - 1);
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emit<"0101001100rrrrrrssssssnnnnnddddd", "d", "n", "r", "s">(wd, wn, lsb.value(), lsb.value() + width.value() - 1);
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}
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void UBFX(XReg xd, XReg xn, Imm<6> lsb, Imm<6> width)
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{
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if (width.value() == 0 || width.value() > (64 - lsb.value()))
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throw "invalid width";
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emit<"1101001101rrrrrrssssssnnnnnddddd", "d", "n", "r", "s">(xd, xn, (-lsb.value()) & 63, width.value() - 1);
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emit<"1101001101rrrrrrssssssnnnnnddddd", "d", "n", "r", "s">(xd, xn, lsb.value(), lsb.value() + width.value() - 1);
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}
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void UDF(Imm<16> imm)
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{
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@ -9,6 +9,10 @@ struct PostIndexed {};
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struct PreIndexed {};
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enum class LslSymbol {
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LSL,
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};
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enum class Cond {
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EQ,
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NE,
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@ -30,7 +34,7 @@ enum class Cond {
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LO = CC,
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};
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Cond invert(Cond c)
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constexpr Cond invert(Cond c)
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{
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return static_cast<Cond>(static_cast<unsigned>(c) ^ 1);
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}
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@ -32,7 +32,7 @@ public:
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static bool is_valid(std::uint32_t value_)
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{
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return ((value_ & mask) != value_);
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return ((value_ & mask) == value_);
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}
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private:
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@ -48,7 +48,7 @@ enum class AddSubImmShift {
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struct AddSubImm {
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public:
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constexpr AddSubImm(std::uint16_t value_, AddSubImmShift shift_)
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constexpr AddSubImm(std::uint32_t value_, AddSubImmShift shift_)
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: m_encoded(value_ | ((shift_ == AddSubImmShift::SHL_12) ? 1 << 12 : 0))
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{
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if ((value_ & 0xFFF) != value_)
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@ -152,23 +152,25 @@ constexpr std::optional<std::uint32_t> encode_bit_imm(std::uint64_t value)
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return std::nullopt;
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const std::size_t rotation = std::countr_zero(value & inverse_mask_from_trailing_ones(value));
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const std::uint64_t emask = mask_from_esize(esize);
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const std::uint64_t rot_element = std::rotr(value, rotation) & emask;
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if (!is_contiguous_mask_from_lsb(rot_element))
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return std::nullopt;
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const std::uint32_t S = std::popcount(rot_element) - 1;
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const std::uint32_t R = rotation & (esize - 1);
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const std::uint32_t S = ((-esize) << 1) | (std::popcount(rot_element) - 1);
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const std::uint32_t R = (esize - rotation) & (esize - 1);
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const std::uint32_t N = (~S >> 6) & 1;
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return static_cast<std::uint32_t>(((((-esize) << 7) | (S << 6) | R) ^ 0x1000) & 0x1fff);
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return static_cast<std::uint32_t>((S & 0b111111) | (R << 6) | (N << 12));
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}
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constexpr std::optional<std::uint32_t> encode_bit_imm(std::uint32_t value)
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{
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const std::uint64_t value_u64 = (static_cast<std::uint64_t>(value) << 32) | static_cast<std::uint64_t>(value);
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const auto result = encode_bit_imm(value_u64);
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if (result && (*result & 0x3FF) != *result)
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if (result && (*result & 0b0'111111'111111) != *result)
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return std::nullopt;
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return result;
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}
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|
|
@ -86,14 +86,14 @@ struct WReg : public RReg {
|
|||
friend class BasicCodeGenerator;
|
||||
};
|
||||
|
||||
XReg RReg::toX() const
|
||||
inline XReg RReg::toX() const
|
||||
{
|
||||
if (index() == -1)
|
||||
throw "cannot convert SP/WSP to XReg";
|
||||
return XReg{index()};
|
||||
}
|
||||
|
||||
WReg RReg::toW() const
|
||||
inline WReg RReg::toW() const
|
||||
{
|
||||
if (index() == -1)
|
||||
throw "cannot convert SP/WSP to WReg";
|
||||
|
|
|
|||
|
|
@ -40,6 +40,9 @@ struct overloaded : Ts... {
|
|||
using Ts::operator()...;
|
||||
};
|
||||
|
||||
template<class... Ts>
|
||||
overloaded(Ts...) -> overloaded<Ts...>;
|
||||
|
||||
} // namespace detail
|
||||
|
||||
struct Label {
|
||||
|
|
@ -124,8 +127,8 @@ private:
|
|||
return encode_fn(Policy::current_address(), *label->m_addr);
|
||||
}
|
||||
|
||||
label->m_wbs.emplace_back({Policy::current_address(), ~splat, static_cast<Label::EmitFunctionType>(encode_fn)});
|
||||
return 0;
|
||||
label->m_wbs.emplace_back(Label::Writeback{Policy::current_address(), ~splat, static_cast<Label::EmitFunctionType>(encode_fn)});
|
||||
return 0u;
|
||||
},
|
||||
[&](void* p) {
|
||||
return encode_fn(Policy::current_address(), reinterpret_cast<std::uintptr_t>(p));
|
||||
|
|
@ -149,8 +152,8 @@ private:
|
|||
return encode_fn(Policy::current_address(), *label->m_addr);
|
||||
}
|
||||
|
||||
label->m_wbs.emplace_back({Policy::current_address(), ~splat, static_cast<Label::EmitFunctionType>(encode_fn)});
|
||||
return 0;
|
||||
label->m_wbs.emplace_back(Label::Writeback{Policy::current_address(), ~splat, static_cast<Label::EmitFunctionType>(encode_fn)});
|
||||
return 0u;
|
||||
},
|
||||
[&](void* p) {
|
||||
return encode_fn(Policy::current_address(), reinterpret_cast<std::uintptr_t>(p));
|
||||
|
|
@ -207,9 +210,9 @@ namespace util {
|
|||
|
||||
inline constexpr WReg W0{0}, W1{1}, W2{2}, W3{3}, W4{4}, W5{5}, W6{6}, W7{7}, W8{8}, W9{9}, W10{10}, W11{11}, W12{12}, W13{13}, W14{14}, W15{15}, W16{16}, W17{17}, W18{18}, W19{19}, W20{20}, W21{21}, W22{22}, W23{23}, W24{24}, W25{25}, W26{26}, W27{27}, W28{28}, W29{29}, W30{30};
|
||||
inline constexpr XReg X0{0}, X1{1}, X2{2}, X3{3}, X4{4}, X5{5}, X6{6}, X7{7}, X8{8}, X9{9}, X10{10}, X11{11}, X12{12}, X13{13}, X14{14}, X15{15}, X16{16}, X17{17}, X18{18}, X19{19}, X20{20}, X21{21}, X22{22}, X23{23}, X24{24}, X25{25}, X26{26}, X27{27}, X28{28}, X29{29}, X30{30};
|
||||
inline constexpr ZrReg ZR{};
|
||||
inline constexpr ZrReg ZR{}, XZR{};
|
||||
inline constexpr WzrReg WZR{};
|
||||
inline constexpr SpReg SP{};
|
||||
inline constexpr SpReg SP{}, XSP{};
|
||||
inline constexpr WspReg WSP{};
|
||||
|
||||
inline constexpr Cond EQ{Cond::EQ}, NE{Cond::NE}, CS{Cond::CS}, CC{Cond::CC}, MI{Cond::MI}, PL{Cond::PL}, VS{Cond::VS}, VC{Cond::VC}, HI{Cond::HI}, LS{Cond::LS}, GE{Cond::GE}, LT{Cond::LT}, GT{Cond::GT}, LE{Cond::LE}, AL{Cond::AL}, NV{Cond::NV}, HS{Cond::HS}, LO{Cond::LO};
|
||||
|
|
@ -222,7 +225,7 @@ inline constexpr auto SXTB{MultiTypedName<AddSubExt::SXTB>{}};
|
|||
inline constexpr auto SXTH{MultiTypedName<AddSubExt::SXTH>{}};
|
||||
inline constexpr auto SXTW{MultiTypedName<AddSubExt::SXTW, IndexExt::SXTW>{}};
|
||||
inline constexpr auto SXTX{MultiTypedName<AddSubExt::SXTX, IndexExt::SXTX>{}};
|
||||
inline constexpr auto LSL{MultiTypedName<AddSubExt::LSL, IndexExt::LSL, AddSubShift::LSL, LogShift::LSL>{}};
|
||||
inline constexpr auto LSL{MultiTypedName<AddSubExt::LSL, IndexExt::LSL, AddSubShift::LSL, LogShift::LSL, LslSymbol::LSL>{}};
|
||||
inline constexpr auto LSR{MultiTypedName<AddSubShift::LSR, LogShift::LSR>{}};
|
||||
inline constexpr auto ASR{MultiTypedName<AddSubShift::ASR, LogShift::ASR>{}};
|
||||
inline constexpr auto ROR{MultiTypedName<LogShift::ROR>{}};
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue