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asimd_load_store_structures.cpp
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frontend: Relocate ExtReg handling to types.h
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2020-05-24 23:55:47 +01:00 |
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asimd_one_reg_modified_immediate.cpp
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asimd_one_reg_modified_immediate: Use {Get,Set}Vector
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2020-05-28 20:40:26 +01:00 |
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asimd_three_same.cpp
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A32: Implement ASIMD VSHL (register)
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2020-06-19 21:27:48 +01:00 |
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asimd_two_regs_misc.cpp
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A32: Implement ASIMD VMVN (register)
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2020-06-19 11:31:14 +01:00 |
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asimd_two_regs_shift.cpp
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asimd: Prevent misdecodes from occurring
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2020-06-18 15:04:48 -04:00 |
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barrier.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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branch.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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coprocessor.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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crc32.cpp
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crc32: Remove unnecessary masking
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2020-06-04 20:33:46 +01:00 |
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data_processing.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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divide.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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exception_generating.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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extension.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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hint.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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load_store.cpp
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fuzz_arm: Ensure all instructions are fuzzed
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2020-05-10 13:57:39 +01:00 |
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misc.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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multiply.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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packing.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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parallel.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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reversal.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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saturated.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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status_register_access.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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synchronization.cpp
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A32 global exlcusive monitor
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2020-06-16 17:54:21 +01:00 |
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thumb16.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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thumb32.cpp
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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translate_arm.h
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A32: Implement ASIMD VSHL (register)
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2020-06-19 21:27:48 +01:00 |
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translate_thumb.h
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Relicense to 0BSD
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2020-04-23 15:45:57 +01:00 |
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vfp.cpp
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VFPv5: Implement VCVT{A,N,P,M}
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2020-06-19 20:31:43 +01:00 |
