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https://github.com/yuzu-mirror/dynarmic.git
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0992987c98
The purpose of this instruction is to raise exceptions when certain decode-time issues happen, instead of asserting at translate time. This allows us to use the translator for code analysis without worrying about unnecessary asserts, but also provides flexibility for the library user to perform custom behaviour when one of these states are raised.
280 lines
7.2 KiB
C++
280 lines
7.2 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2018 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include "common/bit_util.h"
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#include "frontend/ir/terminal.h"
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#include "frontend/A64/translate/impl/impl.h"
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namespace Dynarmic {
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namespace A64 {
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bool TranslatorVisitor::InterpretThisInstruction() {
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ir.SetTerm(IR::Term::Interpret(ir.current_location));
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return false;
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}
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bool TranslatorVisitor::UnpredictableInstruction() {
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ir.ExceptionRaised(Exception::UnpredictableInstruction);
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ir.SetTerm(IR::Term::CheckHalt{IR::Term::ReturnToDispatch{}});
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return false;
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}
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bool TranslatorVisitor::ReservedValue() {
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ir.ExceptionRaised(Exception::ReservedValue);
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ir.SetTerm(IR::Term::CheckHalt{IR::Term::ReturnToDispatch{}});
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return false;
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}
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bool TranslatorVisitor::UnallocatedEncoding() {
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ir.ExceptionRaised(Exception::UnallocatedEncoding);
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ir.SetTerm(IR::Term::CheckHalt{IR::Term::ReturnToDispatch{}});
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return false;
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}
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boost::optional<TranslatorVisitor::BitMasks> TranslatorVisitor::DecodeBitMasks(bool immN, Imm<6> imms, Imm<6> immr, bool immediate) {
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int len = Common::HighestSetBit((immN ? 1 << 6 : 0) | (imms.ZeroExtend() ^ 0b111111));
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if (len < 1)
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return boost::none;
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size_t levels = Common::Ones<size_t>(len);
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if (immediate && (imms.ZeroExtend() & levels) == levels)
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return boost::none;
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s32 S = s32(imms.ZeroExtend() & levels);
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s32 R = s32(immr.ZeroExtend() & levels);
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u64 d = u64(S - R) & levels;
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size_t esize = static_cast<size_t>(1) << len;
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u64 welem = Common::Ones<u64>(S + 1);
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u64 telem = Common::Ones<u64>(d + 1);
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u64 wmask = Common::RotateRight(Common::Replicate(welem, esize), R);
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u64 tmask = Common::Replicate(telem, esize);
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return BitMasks{wmask, tmask};
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}
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IR::U32U64 TranslatorVisitor::I(size_t bitsize, u64 value) {
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switch (bitsize) {
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case 32:
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return ir.Imm32(static_cast<u32>(value));
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case 64:
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return ir.Imm64(value);
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default:
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ASSERT_MSG(false, "Imm - get: Invalid bitsize");
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return {};
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}
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}
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IR::UAny TranslatorVisitor::X(size_t bitsize, Reg reg) {
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switch (bitsize) {
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case 8:
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return ir.LeastSignificantByte(ir.GetW(reg));
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case 16:
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return ir.LeastSignificantHalf(ir.GetW(reg));
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case 32:
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return ir.GetW(reg);
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case 64:
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return ir.GetX(reg);
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default:
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ASSERT_MSG(false, "X - get: Invalid bitsize");
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return {};
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}
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}
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void TranslatorVisitor::X(size_t bitsize, Reg reg, IR::U32U64 value) {
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switch (bitsize) {
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case 32:
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ir.SetW(reg, value);
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return;
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case 64:
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ir.SetX(reg, value);
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return;
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default:
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ASSERT_MSG(false, "X - set: Invalid bitsize");
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}
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}
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IR::U32U64 TranslatorVisitor::SP(size_t bitsize) {
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switch (bitsize) {
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case 32:
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return ir.LeastSignificantWord(ir.GetSP());
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case 64:
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return ir.GetSP();
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default:
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ASSERT_MSG(false, "SP - get : Invalid bitsize");
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return {};
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}
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}
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void TranslatorVisitor::SP(size_t bitsize, IR::U32U64 value) {
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switch (bitsize) {
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case 32:
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ir.SetSP(ir.ZeroExtendWordToLong(value));
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break;
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case 64:
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ir.SetSP(value);
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break;
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default:
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ASSERT_MSG(false, "SP - : Invalid bitsize");
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}
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}
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IR::UAny TranslatorVisitor::Mem(IR::U64 address, size_t bytesize, AccType /*acctype*/) {
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switch (bytesize) {
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case 1:
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return ir.ReadMemory8(address);
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case 2:
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return ir.ReadMemory16(address);
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case 4:
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return ir.ReadMemory32(address);
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case 8:
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return ir.ReadMemory64(address);
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default:
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ASSERT_MSG(false, "Invalid bytesize parameter %zu", bytesize);
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return {};
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}
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}
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void TranslatorVisitor::Mem(IR::U64 address, size_t bytesize, AccType /*acctype*/, IR::UAny value) {
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switch (bytesize) {
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case 1:
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ir.WriteMemory8(address, value);
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return;
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case 2:
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ir.WriteMemory16(address, value);
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return;
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case 4:
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ir.WriteMemory32(address, value);
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return;
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case 8:
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ir.WriteMemory64(address, value);
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return;
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default:
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ASSERT_MSG(false, "Invalid bytesize parameter %zu", bytesize);
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return;
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}
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}
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IR::U32U64 TranslatorVisitor::SignExtend(IR::UAny value, size_t to_size) {
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switch (to_size) {
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case 32:
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return ir.SignExtendToWord(value);
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case 64:
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return ir.SignExtendToLong(value);
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default:
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ASSERT_MSG(false, "Invalid size parameter %zu", to_size);
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return {};
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}
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}
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IR::U32U64 TranslatorVisitor::ZeroExtend(IR::UAny value, size_t to_size) {
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switch (to_size) {
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case 32:
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return ir.ZeroExtendToWord(value);
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case 64:
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return ir.ZeroExtendToLong(value);
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default:
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ASSERT_MSG(false, "Invalid size parameter %zu", to_size);
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return {};
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}
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}
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IR::U32U64 TranslatorVisitor::ShiftReg(size_t bitsize, Reg reg, Imm<2> shift, IR::U8 amount) {
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IR::U32U64 result = X(bitsize, reg);
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switch (shift.ZeroExtend()) {
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case 0b00:
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return ir.LogicalShiftLeft(result, amount);
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case 0b01:
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return ir.LogicalShiftRight(result, amount);
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case 0b10:
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return ir.ArithmeticShiftRight(result, amount);
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case 0b11:
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return ir.RotateRight(result, amount);
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}
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ASSERT_MSG(false, "Unreachable");
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return {};
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}
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IR::U32U64 TranslatorVisitor::ExtendReg(size_t bitsize, Reg reg, Imm<3> option, u8 shift) {
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ASSERT(shift <= 4);
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ASSERT(bitsize == 32 || bitsize == 64);
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IR::UAny val = X(bitsize, reg);
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size_t len;
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IR::U32U64 extended;
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bool signed_extend;
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switch (option.ZeroExtend()) {
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case 0b000: { // UXTB
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val = ir.LeastSignificantByte(val);
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len = 8;
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signed_extend = false;
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break;
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}
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case 0b001: { // UXTH
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val = ir.LeastSignificantHalf(val);
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len = 16;
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signed_extend = false;
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break;
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}
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case 0b010: { // UXTW
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if (bitsize != 32) {
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val = ir.LeastSignificantWord(val);
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}
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len = 32;
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signed_extend = false;
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break;
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}
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case 0b011: { // UXTX
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len = 64;
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signed_extend = false;
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break;
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}
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case 0b100: { // SXTB
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val = ir.LeastSignificantByte(val);
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len = 8;
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signed_extend = true;
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break;
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}
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case 0b101: { // SXTH
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val = ir.LeastSignificantHalf(val);
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len = 16;
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signed_extend = true;
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break;
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}
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case 0b110: { // SXTW
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if (bitsize != 32) {
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val = ir.LeastSignificantWord(val);
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}
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len = 32;
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signed_extend = true;
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break;
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}
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case 0b111: { // SXTX
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len = 64;
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signed_extend = true;
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break;
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}
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default:
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ASSERT_MSG(false, "Unreachable");
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}
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if (len < bitsize) {
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if (bitsize == 32) {
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extended = signed_extend ? ir.SignExtendToWord(val) : ir.ZeroExtendToWord(val);
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} else {
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extended = signed_extend ? ir.SignExtendToLong(val) : ir.ZeroExtendToLong(val);
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}
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} else {
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extended = val;
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}
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return ir.LogicalShiftLeft(extended, ir.Imm8(shift));
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}
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} // namespace A64
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} // namespace Dynarmic
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