17 commits

Author	SHA1	Message	Date
MerryMage	d3664b03fe	ir_emitter: Default fpcr_controlled arguments to true	2020-06-19 22:51:23 +01:00
MerryMage	ad96b2b18d	VFPv5: Implement VCVT{A,N,P,M}	2020-06-19 20:31:43 +01:00
MerryMage	6a965b80d6	VFPv5: Implement VRINT{A,N,P,M}	2020-06-19 20:24:13 +01:00
MerryMage	3e252cdbfc	VFPv5: Implement VSEL	2020-06-19 19:44:45 +01:00
MerryMage	669d05caca	VFPv5: Implement VMINNM	2020-06-19 19:44:45 +01:00
MerryMage	6e7ea151a3	VFPv5: Implement VMAXNM	2020-06-19 19:39:01 +01:00
Lioncash	c4a4bdd7de	frontend: Relocate ExtReg handling to types.h ... Same behavior, but deduplicates the code being placed across several files	2020-05-24 23:55:47 +01:00
MerryMage	59db2c191a	VFPv3: Implement VMOV (immediate)	2020-05-10 15:09:37 +01:00
MerryMage	3c86d58064	VFPv4: Implement VCVTB, VCVTT	2020-05-10 14:45:18 +01:00
MerryMage	010fab9a0e	VFPv4: Implement VFMA, VFMS	2020-05-10 14:20:11 +01:00
MerryMage	8e97b10acb	VFPv4: Implement VFNMS, VFNMA	2020-05-10 14:14:03 +01:00
MerryMage	6df660c889	fuzz_arm: Ensure all instructions are fuzzed ... * VFP instructions were not getting fuzzed due to matching coprocessor instructions (as invalid instructions) * Fix VPOP writeback for doubles when (imm8 & 1) == 1 * Do not accidentally fuzz unimplemented unconditional instructions	2020-05-10 13:57:39 +01:00
MerryMage	9a38c7324f	A32: Add decoders for remaining v7 instructions	2020-05-10 10:50:34 +01:00
MerryMage	a8a712c801	Relicense to 0BSD	2020-04-23 15:45:57 +01:00
Lioncash	6b9bf7868a	General: Correct typos is code comments	2020-04-22 21:04:22 +01:00
Lioncash	fb7d33830c	A32: Make includes consistent ... Normalizes includes to be relative to the project root, like the rest of the includes in the project.	2020-04-22 21:04:22 +01:00
MerryMage	e639aa1583	A32/translate: Rename translate_arm directory to impl ... Mirror what the A64 frontend does.	2020-04-22 21:04:22 +01:00

Renamed from src/frontend/A32/translate/translate_arm/vfp.cpp (Browse further)