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159 commits 1 branch 0 tags 34 MiB
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8 commits

Author SHA1 Message Date
MerryMage 4b31ea25a7 VFP: Implement VADD.{F32,F64} 2016-08-06 20:03:15 +01:00
Tillmann Karras eb2e6e8bea Implement some multiplies 2016-08-05 02:09:54 +01:00
Tillmann Karras fc33f1d374 Implement more instructions 
SXTB, SXTH, SXTAB, SXTAH, UXTB, UXTH, UXTAB, UXTAH, REV16
 2016-08-03 00:47:17 +01:00
Tillmann Karras fe71cc9d78 Disassemble reg-shifted regs in lower case 2016-08-03 00:47:16 +01:00
MerryMage 5fbfc6c155 Implement some simple IR optimizations (get/set eliminiation and DCE) 2016-07-21 21:48:45 +01:00
Subv 0cdf5fe751 Implemented ARM REV and REVSH instructions, with tests. 2016-07-17 14:45:42 -05:00
MerryMage 4b1c27e64f Implement arm_ADC_imm 2016-07-14 20:02:41 +01:00
MerryMage 07eaf100ba Reorganise src/frontend: Add subdirectories disassembler and translate 2016-07-14 14:39:43 +01:00
Renamed from src/frontend/disassembler_arm.cpp (Browse further)