yuzu-mirror/dynarmic
1
0
Fork 0
mirror of https://github.com/yuzu-mirror/dynarmic.git synced 2025-12-06 04:42:00 +01:00
Code Issues Actions Packages Projects Releases Wiki Activity
120 commits 1 branch 0 tags 34 MiB
Commit graph

14 commits

Author SHA1 Message Date
bunnei 691e4139fa arm: Implement B/BL/BX instructions. 2016-08-03 16:49:01 -04:00
Tillmann Karras fc33f1d374 Implement more instructions 
SXTB, SXTH, SXTAB, SXTAH, UXTB, UXTH, UXTAB, UXTAH, REV16
 2016-08-03 00:47:17 +01:00
Tillmann Karras 30a90295b9 Implement data processing instructions 
ADC, ADD, AND, BIC, CMN, CMP, EOR, MOV, MVN, ORR, RSB, RSC, SBC, SUB,
TEQ, TST

The code could use some serious deduplication...
 2016-08-03 00:47:16 +01:00
Subv ccc61472b9 Added format strings for ARM STRBT encodings A1 and A2 2016-07-18 14:20:58 -05:00
Subv 8617bf80a1 Added format strings for ARM LDRBT encodings A1 and A2 2016-07-18 14:18:39 -05:00
Subv 5d5ea9325c Added format strings for ARM STRT encodings A1 and A2 2016-07-18 14:05:53 -05:00
Subv 77761ba032 Added the format strings for LDRT encodings A1 and A2. 2016-07-18 14:01:18 -05:00
MerryMage c18a3eeab4 Better MSVC support 
* Avoiding use of templated variables.
* Now compling on MSVC with /WX (warnings as errors).
* Fixed all MSVC warnings.
* Fixed MSVC source_groups.
 2016-07-18 10:38:22 +01:00
Subv 0cdf5fe751 Implemented ARM REV and REVSH instructions, with tests. 2016-07-17 14:45:42 -05:00
Subv 7f09510945 Implemented ARM CMP (imm) instruction. 2016-07-17 13:29:37 -05:00
MerryMage 4b1c27e64f Implement arm_ADC_imm 2016-07-14 20:02:41 +01:00
MerryMage 9b2aff166a Implement arm_SVC 2016-07-14 14:29:46 +01:00
MerryMage 672ffb93d0 frontend/translator: Skeleton for Arm translator 2016-07-14 13:28:20 +01:00
MerryMage d743adf518 Reorganisation, Import Skyeye, This is a mess 2016-07-04 17:22:11 +08:00
Renamed from src/frontend_arm/decoder/arm.h (Browse further)