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287 commits

Author SHA1 Message Date
MerryMage 41c8dabf0b block_of_code: nop should probably default to a size of 1 2016-08-27 10:57:48 +01:00
MerryMage dca3b2f079 Implement VMRS and VMSR 2016-08-26 22:47:54 +01:00
MerryMage 814348371e emit_x64: EmitX64::Emit: block.Location() returns by value 2016-08-26 19:43:29 +01:00
Lioncash 79545661b3 intrusive_list: De-duplicate some iterator code 
These increment/decrement variants can just leverage the other
overloads.
 2016-08-26 19:15:11 +01:00
MerryMage 4f6ea715b2 emit_x64: EmitX64::Emit doesn't need descriptor argument 2016-08-26 19:14:25 +01:00
Lioncash 32c24d2cb3 Use 'false' instead of '0' in asserts 2016-08-26 18:52:08 +01:00
MerryMage ba31f43672 reg_alloc: UseDefOpArgXmm: default value for argument desired_location should be any_xmm, not any_gpr 2016-08-26 18:50:08 +01:00
MerryMage 7fedf04e79 reg_alloc: Deduplicate constants in RegAlloc::HostCall that were already defined by abi.h 2016-08-26 18:43:50 +01:00
MerryMage 59a8e14d1c reg_alloc: Correct OpArg::setBit for Reg 2016-08-26 15:23:38 +01:00
MerryMage 065c53ebfc emit_x64: Make ZeroIfNaN64 branchless 2016-08-26 15:23:08 +01:00
MerryMage 9901ed0f51 block_of_code: Optimize nops 2016-08-26 13:46:19 +01:00
Lioncash 0102951bdd Convert formatting over to fmtlib 2016-08-26 13:13:19 +01:00
Lioncash ee4b30eee4 externals: Add fmt as a submodule 2016-08-26 13:13:19 +01:00
MerryMage ed3a686d1d Implement public header files 2016-08-26 00:44:50 +01:00
MerryMage 656d4f7252 emit_x64: inhibit_emission is obsolete 
Not used anymore; unused ever since intrusive lists were introduced.
 2016-08-25 23:24:16 +01:00
MerryMage 4322c0907c microinstruction: Rename FindUseWithOpcode to GetAssociatedPseudoOperation, encapsulate associated variables 2016-08-25 21:08:47 +01:00
MerryMage 30df51c2dc ir_emitter: Should be in the IR namespace, not the Arm namespace 2016-08-25 17:36:42 +01:00
MerryMage 922d1fd198 Merge branch 'xbyak' 2016-08-25 16:54:48 +01:00
MerryMage d04b9eaa81 backend_x64/block_of_code: Reset labels when ClearCache() is called 2016-08-25 16:18:18 +01:00
MerryMage e32812cd00 Port x64 backend to xbyak 2016-08-25 16:18:17 +01:00
Lioncash 0e12fb6a56 basic_block: Move all variables behind a public interface 2016-08-25 16:14:37 +01:00
Lioncash 1d8432487d arm_types: Provide the not-equals operator overload for LocationDescriptor 
Generally if == has an overload, != should be provided for symmetry.
 2016-08-25 14:08:16 +01:00
MerryMage 13908c5a58 reg_alloc: Insert braces around DEBUG_ASSERT 
DEBUG_ASSERT becomes an empty statement in release-mode; an if statement
with an empty statement produces a compiler warning.
 2016-08-25 13:09:18 +01:00
MerryMage dc26afbd7e translate_arm: Translate more than one conditional instruction in a block 2016-08-25 13:05:33 +01:00
MerryMage aa9b63bac4 basic_block: DumpBlock now dumps terminal details 2016-08-25 13:01:32 +01:00
Lioncash 1395baefa9 interface: Return register files by const reference 
Prevents unnecessary copies where they aren't particularly required.
 2016-08-25 12:51:41 +01:00
Lioncash 37755cbfec translate: Simplify function pointer calls 
They can just be called like regular functions
 2016-08-24 23:19:50 +01:00
Lioncash 9b874c2e23 CMakeLists: Add FPSCR.h to the list of headers 
Whoops, that one's on me
 2016-08-24 23:19:49 +01:00
MerryMage 22cca5ff72 emit_x64: Actually advance RSB pointer 2016-08-24 23:19:47 +01:00
Lioncash eba3a06d80 frontend: Introduce FPSCR register helper class 
Encapsulates all of the FPSCR state.
 2016-08-24 20:51:14 +01:00
MerryMage b5a86889cd Implement VCVT 2016-08-23 22:20:04 +01:00
MerryMage 445aad0639 x64/emitter: Add opBits argument to CVTSI2SS and CVTSI2SD 2016-08-23 21:58:34 +01:00
MerryMage 78464a8f01 translate_arm/vfp2: Implement VSTM (A1, A2) 2016-08-23 20:54:38 +01:00
MerryMage a96704eb0f arm_types: new_reg >= 0 is always true since new_reg is unsigned 2016-08-23 20:11:41 +01:00
MerryMage 7a01dba3c4 arm_types: Change type signature of operator+ to size_t instead of int 2016-08-23 20:07:53 +01:00
MerryMage af9a68f0d1 translate_arm/vfp2: Implement VLDM (A1, A2) 2016-08-23 20:07:06 +01:00
Lioncash d5805cc6eb intrusive_list: Add size querying 
Since we store pointers and have an interface for iterators
set up, the count is just the distance from the beginning
to the end of the list.

Nice thing is that because of this, basic blocks also get
the ability to have a size count without needing to do anything
directly.
 2016-08-23 19:52:09 +01:00
Lioncash 2180a4be7a basic_block: Use a range-based for loop for iteration 2016-08-23 19:51:01 +01:00
Lioncash 897b776250 string_util: Use C++ attribute specifier for format strings 
This is also compatible with both clang and GCC
 2016-08-23 19:38:48 +01:00
Lioncash 867d345fdc disassembler: Deduplicate SignStr 
Also just makes it return a character, rather than a pointer to a
string.
 2016-08-23 16:40:33 +01:00
Lioncash 8bed891011 x64 emitter: Fix swapped parameter names 2016-08-23 16:39:38 +01:00
MerryMage c8b2f63c93 get_set_elimination_pass: Eliminate unnecessary gets/sets of extended registers 2016-08-23 15:57:20 +01:00
MerryMage e0f9dead5d microinstruction: Identity's type depends on the type of its argument 2016-08-23 15:48:30 +01:00
Lioncash 67706c208b assert: Use false in asserts rather than 0 
Quiets extended warnings.
 2016-08-23 14:31:54 +01:00
MerryMage 8c7a81a308 VPOP and VPUSH are floating-point load-store instructions 2016-08-23 14:26:50 +01:00
MerryMage 34cffa86a4 dead_code_elimination_pass: Update to use IR::Inst::MayHaveSideEffects 2016-08-23 13:12:14 +01:00
Lioncash 46573eb538 intrusive_list: Add insert_before() and insert_after() helper functions 
Small helpers for inserting nodes before and after an existing one.
insert() is the same as insert_before(), so insert() is just made
to be an alias of this.
 2016-08-23 12:38:57 +01:00
MerryMage 8d1b9f32ca Standardize indentation of switch statments 2016-08-23 12:19:27 +01:00
MerryMage 2471be317e arm_types: Implement LocationDescription::FPSCR_RMode 2016-08-23 02:22:04 +01:00
Lioncash 47f285249b microinstruction: Introduce convenience informational functions 
Whenever more rigorous optimizations are attempted (or even basic ones),
it's usually helpful to know what overall kind of instruction is being
dealt with, in the event certain classes of instructions may be eligible
for optimization.
 2016-08-22 21:36:48 +01:00