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2020 commits 1 branch 0 tags 34 MiB
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33 commits

Author SHA1 Message Date
Merry fd6222f0a1 Merge pull request #500 from lioncash/cbz 
A32: Implement Thumb-1's CBZ/CBNZ instructions
 2020-04-22 21:04:21 +01:00
Lioncash 03e6899fd7 A32: Implement Thumb-1's CBZ/CBNZ instructions 
Introduced in ARMv6T2, this allows for short forward branches.
 2020-04-22 21:02:47 +01:00
Lioncash 106c8c2473 A32: Implement ARM-mode MOVW 
Introduced to the ISA in ARMv6T2
 2020-04-22 21:02:47 +01:00
Lioncash 9935f3aa28 A32: Implement Thumb-1 variant of SEVL 
While we're at it, also add the Thumb-2 encoding to the encoding table
to make sure it isn't forgotten about in the future.
 2020-04-22 21:02:47 +01:00
Lioncash 9a097e307f A32: Implement the ARM-mode variant of SEVL 2020-04-22 21:02:47 +01:00
Lioncash e89ca42048 A32: Implement Thumb-1 variant of YIELD 2020-04-22 21:02:47 +01:00
Lioncash ebab7ede55 A32: Implement Thumb-1 variant of WFI 2020-04-22 21:02:47 +01:00
Lioncash b4110af22a A32: Implement Thumb-1 variant of WFE 2020-04-22 21:02:47 +01:00
Lioncash 57675fe592 A32: Implement Thumb-1 variant of SEV 2020-04-22 21:02:47 +01:00
Lioncash 64879396f6 A32: Implement Thumb-1 variant of NOP 2020-04-22 21:02:47 +01:00
Merry 81b908b077 Merge pull request #495 from lioncash/bkpt 
A32: Implement Thumb-16's variant of BKPT
 2020-04-22 21:02:47 +01:00
Lioncash b17a5d3365 A32: Implement Thumb-16's variant of BKPT 2020-04-22 21:02:47 +01:00
Lioncash 0fa0bca22a A32: Handle different variants of PLD 2020-04-22 21:02:47 +01:00
Merry 30d28029a8 Merge pull request #492 from lioncash/vfp 
A32: Rename vfp2-related files to vfp
 2020-04-22 21:02:47 +01:00
Lioncash 97277c598b A32: Rename vfp2-related files to vfp 
Now that we fuzz against Unicorn, we aren't just restricted to VFPv2.
VFPv3 and VFPv4 facilities can now be implemented. This renames
constructs mentioning VFPv2 to just refer to VFP.
 2020-04-22 21:02:46 +01:00
Lioncash e37689315d A32: Implement ARM-mode CRC32 instructions 
Implements the ARM-mode variants of the CRC32 instructions introduced
within ARMv8. This is also one of the instruction cases where there is
UNPREDICTABLE behavior that is constrained (we must do one of the
options indicated by the reference manual).

In both documented cases of constrained unpredictable behavior, we treat
the instructions as unpredictable in order to allow library users to
hook the unpredictable exception to provide the intended behavior they
desire.
 2020-04-22 21:02:46 +01:00
Lioncash 8316d231e9 A32: Implement barrier instructions introduced in ARMv7 
Provides basic implementations of the barrier instruction introduced
within ARMv7. Currently these simply mirror the behavior of the AArch64
equivalents.
 2020-04-22 21:02:46 +01:00
Lioncash 7fc3bd689d A32: Implement ARM-mode MLS 2020-04-22 21:02:46 +01:00
Lioncash 8b338b7def A32: Implement ARM-mode MOVT 2020-04-22 21:02:46 +01:00
Lioncash 877fa0f8c3 A32: Implement ARM-mode SBFX 2020-04-22 21:02:46 +01:00
Lioncash 47218ee65d A32: Implement ARM-mode UBFX 2020-04-22 21:02:46 +01:00
Lioncash 2970b34e3c A32: Implement ARM-mode BFI 2020-04-22 21:02:46 +01:00
Lioncash fab3a59e05 A32: Implement ARM-mode BFC 2020-04-22 21:02:46 +01:00
Lioncash 7305d13221 A32: Implement ARM-mode RBIT 2020-04-22 21:02:46 +01:00
Lioncash b2f7a0e7ba A32: Implement ARM-mode SDIV/UDIV 
Now that we have Unicorn in place, we can freely implement instructions
introduced in newer versions of the ARM architecture.
 2020-04-22 21:02:46 +01:00
V.Kalyuzhny 764a93bf5a Switch boost::optional to std::optional 2020-04-22 20:57:37 +01:00
Lioncash e30f9816ec A32/decoder: Add missing <algorithm> includes 
These includes should be present, as we use std::find_if() within these headers.
 2020-04-22 20:53:46 +01:00
MerryMage 71e137715d status_register_access: Add support for bits 0 and 1 of mask to MSR 2020-04-22 20:46:23 +01:00
MerryMage ff3805e332 A32/decoders: Split instruction list into include file 2020-04-22 20:46:23 +01:00
MerryMage 01c1e9017e T32: Add initial decoder list 2020-04-22 20:46:14 +01:00
MerryMage ba4a779c62 A32/decoder/arm: bug: Correct bitstring for SRS 2020-04-22 20:46:13 +01:00
Lioncash 67443efb62 General: Convert multiple namespace specifiers to nested namespace specifiers where applicable 
Makes namespacing a little less noisy
 2020-04-22 20:44:38 +01:00
MerryMage b3c73e2622 Label A32 specific code appropriately 2020-04-22 20:33:30 +01:00