xenia/src/xenia/cpu/frontend/test/bin/instr_rldicl.map
2015-05-13 18:04:33 -07:00

29 lines
1 KiB
Plaintext

0000000000000000 t test_rldicl_1
0000000000000008 t test_rldicl_1_constant
000000000000002c t test_rldicl_2
0000000000000034 t test_rldicl_2_constant
0000000000000058 t test_rldicl_3
0000000000000060 t test_rldicl_3_constant
0000000000000084 t test_rldicl_4
000000000000008c t test_rldicl_4_constant
00000000000000b0 t test_rldicl_5
00000000000000b8 t test_rldicl_5_constant
00000000000000dc t test_rldicl_6
00000000000000e4 t test_rldicl_6_constant
0000000000000108 t test_rldicl_7
0000000000000110 t test_rldicl_7_constant
0000000000000134 t test_rldicl_8
000000000000013c t test_rldicl_8_constant
0000000000000160 t test_rldicl_9
0000000000000168 t test_rldicl_9_constant
000000000000018c t test_rldicl_10
0000000000000194 t test_rldicl_10_constant
00000000000001a0 t test_srdi_1
00000000000001ac t test_srdi_1_constant
00000000000001d8 t test_srdi_2
00000000000001e4 t test_srdi_2_constant
0000000000000210 t test_srdi_3
000000000000021c t test_srdi_3_constant
0000000000000248 t test_srdi_4
0000000000000254 t test_srdi_4_constant