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[a64] Implement OPCODE_VECTOR_MIN

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Passes unit tests
This commit is contained in:
Wunkolo 2024-05-04 12:01:57 -07:00
parent 3ac51212a6
commit ebd1f84d25
1 changed files with 6 additions and 6 deletions
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12
src/xenia/cpu/backend/a64/a64_seq_vector.cc
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@ -260,13 +260,13 @@ struct VECTOR_MIN
if (i.instr->flags & ARITHMETIC_UNSIGNED) { if (i.instr->flags & ARITHMETIC_UNSIGNED) {
switch (part_type) { switch (part_type) {
case INT8_TYPE: case INT8_TYPE:
// e.vpminub(dest, src1, src2); e.UMIN(dest.B16(), src1.B16(), src2.B16());
break; break;
case INT16_TYPE: case INT16_TYPE:
// e.vpminuw(dest, src1, src2); e.UMIN(dest.H8(), src1.H8(), src2.H8());
break; break;
case INT32_TYPE: case INT32_TYPE:
// e.vpminud(dest, src1, src2); e.UMIN(dest.S4(), src1.S4(), src2.S4());
break; break;
default: default:
assert_unhandled_case(part_type); assert_unhandled_case(part_type);
@ -275,13 +275,13 @@ struct VECTOR_MIN
} else { } else {
switch (part_type) { switch (part_type) {
case INT8_TYPE: case INT8_TYPE:
// e.vpminsb(dest, src1, src2); e.SMIN(dest.B16(), src1.B16(), src2.B16());
break; break;
case INT16_TYPE: case INT16_TYPE:
// e.vpminsw(dest, src1, src2); e.SMIN(dest.H8(), src1.H8(), src2.H8());
break; break;
case INT32_TYPE: case INT32_TYPE:
// e.vpminsd(dest, src1, src2); e.SMIN(dest.S4(), src1.S4(), src2.S4());
break; break;
default: default:
assert_unhandled_case(part_type); assert_unhandled_case(part_type);