diff --git a/src/xenia/cpu/ppc/ppc_opcode_disasm.cc b/src/xenia/cpu/ppc/ppc_opcode_disasm.cc
index 6b19413a6..fbf4d99ca 100644
--- a/src/xenia/cpu/ppc/ppc_opcode_disasm.cc
+++ b/src/xenia/cpu/ppc/ppc_opcode_disasm.cc
@@ -5113,7 +5113,7 @@ PPCOpcodeDisasmInfo ppc_opcode_disasm_table[] = {
   INSTRUCTION(0x7c000400, "mcrxr"       , kX      , kC, kGeneral, "Move to Condition Register from XER"                                        , (PPCOpcodeField::kCR), (PPCOpcodeField::kCRFD), PrintDisasm_mcrxr),
   INSTRUCTION(0x7c000026, "mfcr"        , kX      , kC, kGeneral, "Move from Condition Register"                                               , (PPCOpcodeField::kCR), (PPCOpcodeField::kRD), PrintDisasm_mfcr),
   INSTRUCTION(0xfc00048e, "mffsx"       , kX      , kC, kGeneral, "Move from FPSCR"                                                            , (PPCOpcodeField::kFPSCR), (PPCOpcodeField::kFD,PPCOpcodeField::kCRcond), PrintDisasm_mffsx),
-  INSTRUCTION(0x7c0000a6, "mfmsr"       , kX      , kC, kGeneral, "Move from Machine State Register"                                           , (PPCOpcodeField::kMSR), (PPCOpcodeField::kRD), PrintDisasm_mfmsr),
+  INSTRUCTION(0x7c0000a6, "mfmsr"       , kX      , kC, kSync   , "Move from Machine State Register"                                           , (PPCOpcodeField::kMSR), (PPCOpcodeField::kRD), PrintDisasm_mfmsr),
   INSTRUCTION(0x7c0002a6, "mfspr"       , kXFX    , kC, kGeneral, "Move from Special-Purpose Register"                                         , (PPCOpcodeField::kSPR), (PPCOpcodeField::kRD), PrintDisasm_mfspr),
   INSTRUCTION(0x7c0002e6, "mftb"        , kXFX    , kC, kGeneral, "Move from Time Base"                                                        , (PPCOpcodeField::kTBR), (PPCOpcodeField::kRD), PrintDisasm_mftb),
   INSTRUCTION(0x10000604, "mfvscr"      , kVX     , kC, kGeneral, "Move from VSCR"                                                             , (PPCOpcodeField::kVSCR), (PPCOpcodeField::kVD), nullptr),
@@ -5122,8 +5122,8 @@ PPCOpcodeDisasmInfo ppc_opcode_disasm_table[] = {
   INSTRUCTION(0xfc00004c, "mtfsb1x"     , kX      , kC, kGeneral, "Move to FPSCR Bit 1"                                                        , (), (PPCOpcodeField::kFPSCRD,PPCOpcodeField::kCRcond), PrintDisasm_mtfsb1x),
   INSTRUCTION(0xfc00010c, "mtfsfix"     , kX      , kC, kGeneral, "Move to FPSCR Field Immediate"                                              , (PPCOpcodeField::kIMM), (PPCOpcodeField::kCRFD,PPCOpcodeField::kCRcond), PrintDisasm_mtfsfix),
   INSTRUCTION(0xfc00058e, "mtfsfx"      , kXFL    , kC, kGeneral, "Move to FPSCR Fields"                                                       , (PPCOpcodeField::kFM,PPCOpcodeField::kFB), (PPCOpcodeField::kFPSCR,PPCOpcodeField::kCRcond), PrintDisasm_mtfsfx),
-  INSTRUCTION(0x7c000124, "mtmsr"       , kX      , kC, kGeneral, "Move to Machine State Register"                                             , (PPCOpcodeField::kRS), (PPCOpcodeField::kMSR), PrintDisasm_mtmsr),
-  INSTRUCTION(0x7c000164, "mtmsrd"      , kX      , kC, kGeneral, "Move to Machine State Register Doubleword"                                  , (PPCOpcodeField::kRS), (PPCOpcodeField::kMSR), PrintDisasm_mtmsrd),
+  INSTRUCTION(0x7c000124, "mtmsr"       , kX      , kC, kSync   , "Move to Machine State Register"                                             , (PPCOpcodeField::kRS), (PPCOpcodeField::kMSR), PrintDisasm_mtmsr),
+  INSTRUCTION(0x7c000164, "mtmsrd"      , kX      , kC, kSync   , "Move to Machine State Register Doubleword"                                  , (PPCOpcodeField::kRS), (PPCOpcodeField::kMSR), PrintDisasm_mtmsrd),
   INSTRUCTION(0x7c0003a6, "mtspr"       , kXFX    , kC, kGeneral, "Move to Special-Purpose Register"                                           , (PPCOpcodeField::kRS), (PPCOpcodeField::kSPR), PrintDisasm_mtspr),
   INSTRUCTION(0x10000644, "mtvscr"      , kVX     , kC, kGeneral, "Move to VSCR"                                                               , (PPCOpcodeField::kVB), (PPCOpcodeField::kVSCR), nullptr),
   INSTRUCTION(0x7c000012, "mulhdux"     , kXO     , kI, kGeneral, "Multiply High Doubleword Unsigned"                                          , (PPCOpcodeField::kRA,PPCOpcodeField::kRB), (PPCOpcodeField::kRD,PPCOpcodeField::kCRcond), PrintDisasm_mulhdux),
diff --git a/src/xenia/cpu/ppc/ppc_opcode_table.cc b/src/xenia/cpu/ppc/ppc_opcode_table.cc
index 7cc0ea257..8dc68f815 100644
--- a/src/xenia/cpu/ppc/ppc_opcode_table.cc
+++ b/src/xenia/cpu/ppc/ppc_opcode_table.cc
@@ -159,7 +159,7 @@ PPCOpcodeInfo ppc_opcode_table[] = {
   INSTRUCTION(0x7c000400, "mcrxr"       , kX      , kC, kGeneral),
   INSTRUCTION(0x7c000026, "mfcr"        , kX      , kC, kGeneral),
   INSTRUCTION(0xfc00048e, "mffsx"       , kX      , kC, kGeneral),
-  INSTRUCTION(0x7c0000a6, "mfmsr"       , kX      , kC, kGeneral),
+  INSTRUCTION(0x7c0000a6, "mfmsr"       , kX      , kC, kSync   ),
   INSTRUCTION(0x7c0002a6, "mfspr"       , kXFX    , kC, kGeneral),
   INSTRUCTION(0x7c0002e6, "mftb"        , kXFX    , kC, kGeneral),
   INSTRUCTION(0x10000604, "mfvscr"      , kVX     , kC, kGeneral),
@@ -168,8 +168,8 @@ PPCOpcodeInfo ppc_opcode_table[] = {
   INSTRUCTION(0xfc00004c, "mtfsb1x"     , kX      , kC, kGeneral),
   INSTRUCTION(0xfc00010c, "mtfsfix"     , kX      , kC, kGeneral),
   INSTRUCTION(0xfc00058e, "mtfsfx"      , kXFL    , kC, kGeneral),
-  INSTRUCTION(0x7c000124, "mtmsr"       , kX      , kC, kGeneral),
-  INSTRUCTION(0x7c000164, "mtmsrd"      , kX      , kC, kGeneral),
+  INSTRUCTION(0x7c000124, "mtmsr"       , kX      , kC, kSync   ),
+  INSTRUCTION(0x7c000164, "mtmsrd"      , kX      , kC, kSync   ),
   INSTRUCTION(0x7c0003a6, "mtspr"       , kXFX    , kC, kGeneral),
   INSTRUCTION(0x10000644, "mtvscr"      , kVX     , kC, kGeneral),
   INSTRUCTION(0x7c000012, "mulhdux"     , kXO     , kI, kGeneral),
diff --git a/tools/ppc-instructions.xml b/tools/ppc-instructions.xml
index d43de7519..769790fec 100644
--- a/tools/ppc-instructions.xml
+++ b/tools/ppc-instructions.xml
@@ -852,7 +852,7 @@
     <out field="CR" conditional="true" />
     <disasm>mffs[Rc] [RD]</disasm>
   </insn>
-  <insn mnem="mfmsr"        opcode="7c0000a6" form="X"        group="c" desc="Move from Machine State Register">
+  <insn mnem="mfmsr"        opcode="7c0000a6" form="X"        group="c" desc="Move from Machine State Register" sync="true">
     <in field="MSR" />
     <out field="RD" />
     <disasm>mfmsr [RD]</disasm>
@@ -895,12 +895,12 @@
     <out field="CR" conditional="true" />
     <disasm>mtfsfi[Rc] [CRFD], [IMM]</disasm>
   </insn>
-  <insn mnem="mtmsr"        opcode="7c000124" form="X"        group="c" desc="Move to Machine State Register">
+  <insn mnem="mtmsr"        opcode="7c000124" form="X"        group="c" desc="Move to Machine State Register" sync="true">
     <in field="RS" />
     <out field="MSR" />
     <disasm>mtmsr [RS]</disasm>
   </insn>
-  <insn mnem="mtmsrd"       opcode="7c000164" form="X"        group="c" desc="Move to Machine State Register Doubleword">
+  <insn mnem="mtmsrd"       opcode="7c000164" form="X"        group="c" desc="Move to Machine State Register Doubleword" sync="true">
     <in field="RS" />
     <out field="MSR" />
     <disasm>mtmsrd [RS]</disasm>