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[x64] Factor out vector handling code
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src/xenia/cpu/backend/x64/x64_seq_vector.cc
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2623
src/xenia/cpu/backend/x64/x64_seq_vector.cc
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@ -40,6 +40,9 @@ static bool Register() {
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#define EMITTER_OPCODE_TABLE(name, ...) \
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const auto X64_INSTR_##name = Register<__VA_ARGS__>();
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// Registration functions to force inclusion of several files
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void RegisterVector();
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void RegisterSequences();
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bool SelectSequence(X64Emitter* e, const hir::Instr* i,
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const hir::Instr** new_tail);
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