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[GPU] Occlusion query faking extension
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@ -55,10 +55,14 @@ DEFINE_bool(
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"when MSAA is used with fullscreen passes.",
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"GPU");
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DEFINE_int32(query_occlusion_fake_sample_count, 100,
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DEFINE_int32(query_occlusion_sample_lower_threshold, 80,
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"If set to -1 no sample counts are written, games may hang. Else, "
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"the sample count of every tile will be incremented on every "
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"EVENT_WRITE_ZPD by this number. Setting this to 0 means "
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"everything is reported as occluded.",
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"GPU");
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UPDATE_from_int32(query_occlusion_fake_sample_count, 2024, 9, 23, 9, 1000);
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DEFINE_int32(
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query_occlusion_sample_upper_threshold, 100,
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"Set to higher number than query_occlusion_sample_lower_threshold. This "
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"value is ignored if query_occlusion_sample_lower_threshold is set to -1.",
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"GPU");
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@ -26,7 +26,9 @@ DECLARE_bool(non_seamless_cube_map);
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DECLARE_bool(half_pixel_offset);
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DECLARE_int32(query_occlusion_fake_sample_count);
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DECLARE_int32(query_occlusion_sample_lower_threshold);
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DECLARE_int32(query_occlusion_sample_upper_threshold);
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DECLARE_bool(disassemble_pm4);
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@ -953,6 +953,9 @@ bool COMMAND_PROCESSOR::ExecutePacketType3_EVENT_WRITE_EXT(
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trace_writer_.WriteMemoryWrite(CpuToGpu(address), sizeof(extents));
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return true;
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}
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static uint32_t samples = cvars::query_occlusion_sample_upper_threshold;
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XE_NOINLINE
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bool COMMAND_PROCESSOR::ExecutePacketType3_EVENT_WRITE_ZPD(
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uint32_t packet, uint32_t count) XE_RESTRICT {
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@ -963,28 +966,33 @@ bool COMMAND_PROCESSOR::ExecutePacketType3_EVENT_WRITE_ZPD(
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// Writeback initiator.
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COMMAND_PROCESSOR::WriteEventInitiator(initiator & 0x3F);
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if (cvars::query_occlusion_sample_lower_threshold < 0) {
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return true;
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}
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// Occlusion queries:
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// This command is send on query begin and end.
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// As a workaround report some fixed amount of passed samples.
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auto fake_sample_count = cvars::query_occlusion_fake_sample_count;
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if (fake_sample_count >= 0) {
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auto* pSampleCounts =
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memory_->TranslatePhysical<xe_gpu_depth_sample_counts*>(
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register_file_->values[XE_GPU_REG_RB_SAMPLE_COUNT_ADDR]);
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// 0xFFFFFEED is written to this two locations by D3D only on D3DISSUE_END
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// and used to detect a finished query.
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bool is_end_via_z_pass = pSampleCounts->ZPass_A == kQueryFinished &&
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pSampleCounts->ZPass_B == kQueryFinished;
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// Older versions of D3D also checks for ZFail (4D5307D5).
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bool is_end_via_z_fail = pSampleCounts->ZFail_A == kQueryFinished &&
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pSampleCounts->ZFail_B == kQueryFinished;
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std::memset(pSampleCounts, 0, sizeof(xe_gpu_depth_sample_counts));
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if (is_end_via_z_pass || is_end_via_z_fail) {
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pSampleCounts->ZPass_A = fake_sample_count;
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pSampleCounts->Total_A = fake_sample_count;
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}
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auto* pSampleCounts = memory_->TranslatePhysical<xe_gpu_depth_sample_counts*>(
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register_file_->values[XE_GPU_REG_RB_SAMPLE_COUNT_ADDR]);
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// 0xFFFFFEED is written to this two locations by D3D only on D3DISSUE_END
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// and used to detect a finished query.
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bool is_end_via_z_pass = pSampleCounts->ZPass_A == kQueryFinished &&
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pSampleCounts->ZPass_B == kQueryFinished;
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// Older versions of D3D also checks for ZFail (4D5307D5).
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bool is_end_via_z_fail = pSampleCounts->ZFail_A == kQueryFinished &&
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pSampleCounts->ZFail_B == kQueryFinished;
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std::memset(pSampleCounts, 0, sizeof(xe_gpu_depth_sample_counts));
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if (is_end_via_z_pass || is_end_via_z_fail) {
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pSampleCounts->ZPass_A = samples;
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pSampleCounts->Total_A = samples;
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}
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samples =
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samples <= static_cast<uint32_t>(
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cvars::query_occlusion_sample_lower_threshold)
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? static_cast<uint32_t>(cvars::query_occlusion_sample_upper_threshold)
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: samples - 1;
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return true;
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}
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