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Test for vrlh.

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gibbed 2015-08-16 16:29:07 -05:00
parent 5621f63001
commit ac4c5f4508
1 changed files with 8 additions and 0 deletions
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src/xenia/cpu/frontend/testing/instr_vrlh.s Normal file
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test_vrlh_1:
#_ REGISTER_IN v3 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v4 [000D000D, 000D000D, 000D000D, 000D000D]
vrlh v5, v3, v4
blr
#_ REGISTER_OUT v3 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v4 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v5 [82460ACF, B0EC2864, 42248668, CAAC0EF1]