From 8a65dbd0240fadaaea2b78f1df3f6f51e231dc8f Mon Sep 17 00:00:00 2001
From: gibbed <rick@gibbed.us>
Date: Mon, 21 May 2018 22:56:05 -0500
Subject: [PATCH] [GPU] Make some gaps in the register table more obvious.

---
 src/xenia/gpu/register_table.inc | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/xenia/gpu/register_table.inc b/src/xenia/gpu/register_table.inc
index 3ab07abd5..3df06bfd9 100644
--- a/src/xenia/gpu/register_table.inc
+++ b/src/xenia/gpu/register_table.inc
@@ -43,6 +43,7 @@ XE_GPU_REGISTER(0x0A31, kDword, COHER_STATUS_HOST)
 XE_GPU_REGISTER(0x0D00, kDword, SQ_GPR_MANAGEMENT)
 XE_GPU_REGISTER(0x0D01, kDword, SQ_FLOW_CONTROL)
 XE_GPU_REGISTER(0x0D02, kDword, SQ_INST_STORE_MANAGMENT)
+
 XE_GPU_REGISTER(0x0D04, kDword, SQ_EO_RT)
 
 XE_GPU_REGISTER(0x0C85, kDword, PA_CL_ENHANCE)
@@ -60,18 +61,25 @@ XE_GPU_REGISTER(0x0F02, kDword, RB_EDRAM_INFO)
 XE_GPU_REGISTER(0x1838, kDword, D1MODE_MASTER_UPDATE_LOCK)
 
 XE_GPU_REGISTER(0x1841, kDword, D1GRPH_CONTROL)
+
 XE_GPU_REGISTER(0x1844, kDword, D1GRPH_PRIMARY_SURFACE_ADDRESS)
+
 XE_GPU_REGISTER(0x1852, kDword, D1GRPH_FLIP_CONTROL)
 
 XE_GPU_REGISTER(0x1921, kDword, DC_LUT_RW_MODE)
 XE_GPU_REGISTER(0x1922, kDword, DC_LUT_RW_INDEX)
+
 XE_GPU_REGISTER(0x1924, kDword, DC_LUT_PWL_DATA)
 XE_GPU_REGISTER(0x1925, kDword, DC_LUT_30_COLOR)
+
 XE_GPU_REGISTER(0x1927, kDword, DC_LUT_WRITE_EN_MASK)
+
 XE_GPU_REGISTER(0x1930, kDword, DC_LUTA_CONTROL)
 
 XE_GPU_REGISTER(0x1961, kDword, AVIVO_D1MODE_VIEWPORT_SIZE)
+
 XE_GPU_REGISTER(0x1964, kDword, AVIVO_D1SCL_SCALER_ENABLE)
+
 XE_GPU_REGISTER(0x1973, kDword, AVIVO_D1SCL_UPDATE)
 
 XE_GPU_REGISTER(0x2000, kDword, RB_SURFACE_INFO)