From 4c7d152fee445349fb709b53cd52602f2c5e055d Mon Sep 17 00:00:00 2001 From: "Herman S." <429230+has207@users.noreply.github.com> Date: Tue, 14 Oct 2025 16:18:50 +0900 Subject: [PATCH] [Testing] Add missing avg and min/max tests --- src/xenia/cpu/ppc/testing/instr_vavgsb.s | 44 ++++++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vavgsh.s | 53 ++++++++++++++++++++---- src/xenia/cpu/ppc/testing/instr_vavgsw.s | 44 ++++++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vavgub.s | 44 ++++++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vavguh.s | 36 ++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vavguw.s | 44 ++++++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vmaxsb.s | 44 ++++++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vmaxsh.s | 36 ++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vmaxsw.s | 44 ++++++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vmaxub.s | 35 ++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vmaxuh.s | 27 ++++++++++++ src/xenia/cpu/ppc/testing/instr_vmaxuw.s | 35 ++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vminsb.s | 44 ++++++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vminsh.s | 36 ++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vminsw.s | 44 ++++++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vminub.s | 35 ++++++++++++++++ src/xenia/cpu/ppc/testing/instr_vminuh.s | 27 ++++++++++++ src/xenia/cpu/ppc/testing/instr_vminuw.s | 35 ++++++++++++++++ 18 files changed, 698 insertions(+), 9 deletions(-) create mode 100644 src/xenia/cpu/ppc/testing/instr_vavgsb.s create mode 100644 src/xenia/cpu/ppc/testing/instr_vavgsw.s create mode 100644 src/xenia/cpu/ppc/testing/instr_vavgub.s create mode 100644 src/xenia/cpu/ppc/testing/instr_vavguw.s create mode 100644 src/xenia/cpu/ppc/testing/instr_vmaxsb.s create mode 100644 src/xenia/cpu/ppc/testing/instr_vmaxsw.s create mode 100644 src/xenia/cpu/ppc/testing/instr_vmaxub.s create mode 100644 src/xenia/cpu/ppc/testing/instr_vmaxuw.s create mode 100644 src/xenia/cpu/ppc/testing/instr_vminsb.s create mode 100644 src/xenia/cpu/ppc/testing/instr_vminsw.s create mode 100644 src/xenia/cpu/ppc/testing/instr_vminub.s create mode 100644 src/xenia/cpu/ppc/testing/instr_vminuw.s diff --git a/src/xenia/cpu/ppc/testing/instr_vavgsb.s b/src/xenia/cpu/ppc/testing/instr_vavgsb.s new file mode 100644 index 000000000..807ba544f --- /dev/null +++ b/src/xenia/cpu/ppc/testing/instr_vavgsb.s @@ -0,0 +1,44 @@ +test_vavgsb_1: + #_ REGISTER_IN v3 [02040608, 0A0C0E10, 12141618, 1A1C1E20] + #_ REGISTER_IN v4 [01030507, 090B0D0F, 11131517, 191B1D1F] + vavgsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [02040608, 0A0C0E10, 12141618, 1A1C1E20] + #_ REGISTER_OUT v4 [01030507, 090B0D0F, 11131517, 191B1D1F] + #_ REGISTER_OUT v5 [02040608, 0A0C0E10, 12141618, 1A1C1E20] + +test_vavgsb_2: + #_ REGISTER_IN v3 [7F7F7F7F, 7F7F7F7F, 7F7F7F7F, 7F7F7F7F] + #_ REGISTER_IN v4 [7F7F7F7F, 7F7F7F7F, 7F7F7F7F, 7F7F7F7F] + vavgsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [7F7F7F7F, 7F7F7F7F, 7F7F7F7F, 7F7F7F7F] + #_ REGISTER_OUT v4 [7F7F7F7F, 7F7F7F7F, 7F7F7F7F, 7F7F7F7F] + #_ REGISTER_OUT v5 [7F7F7F7F, 7F7F7F7F, 7F7F7F7F, 7F7F7F7F] + +test_vavgsb_3: + #_ REGISTER_IN v3 [80808080, 80808080, 80808080, 80808080] + #_ REGISTER_IN v4 [80808080, 80808080, 80808080, 80808080] + vavgsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [80808080, 80808080, 80808080, 80808080] + #_ REGISTER_OUT v4 [80808080, 80808080, 80808080, 80808080] + #_ REGISTER_OUT v5 [80808080, 80808080, 80808080, 80808080] + +test_vavgsb_4: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vavgsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] + +test_vavgsb_5: + #_ REGISTER_IN v3 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000] + vavgsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v5 [01010101, 01010101, 01010101, 01010101] diff --git a/src/xenia/cpu/ppc/testing/instr_vavgsh.s b/src/xenia/cpu/ppc/testing/instr_vavgsh.s index 4035bf855..992d6fb05 100644 --- a/src/xenia/cpu/ppc/testing/instr_vavgsh.s +++ b/src/xenia/cpu/ppc/testing/instr_vavgsh.s @@ -1,9 +1,44 @@ -#vavgsh isn't implemented -#test_vavgsh_1: -# #_ REGISTER_IN v3 [00000001, 00020003, 00040005, 00060007] -# #_ REGISTER_IN v4 [00080009, 000A000B, 000C000D, 000E000F] -# vavgsh v5, v3, v4 -# blr -# #_ REGISTER_OUT v3 [00000001, 00020003, 00040005, 00060007] -# #_ REGISTER_OUT v4 [00080009, 000A000B, 000C000D, 000E000F] -# #_ REGISTER_OUT v5 [00040005, 00060007, 00080009, 000A000B] +test_vavgsh_1: + #_ REGISTER_IN v3 [00020004, 00060008, 000A000C, 000E0010] + #_ REGISTER_IN v4 [00010003, 00050007, 0009000B, 000D000F] + vavgsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00020004, 00060008, 000A000C, 000E0010] + #_ REGISTER_OUT v4 [00010003, 00050007, 0009000B, 000D000F] + #_ REGISTER_OUT v5 [00020004, 00060008, 000A000C, 000E0010] + +test_vavgsh_2: + #_ REGISTER_IN v3 [7FFF7FFF, 7FFF7FFF, 7FFF7FFF, 7FFF7FFF] + #_ REGISTER_IN v4 [7FFF7FFF, 7FFF7FFF, 7FFF7FFF, 7FFF7FFF] + vavgsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [7FFF7FFF, 7FFF7FFF, 7FFF7FFF, 7FFF7FFF] + #_ REGISTER_OUT v4 [7FFF7FFF, 7FFF7FFF, 7FFF7FFF, 7FFF7FFF] + #_ REGISTER_OUT v5 [7FFF7FFF, 7FFF7FFF, 7FFF7FFF, 7FFF7FFF] + +test_vavgsh_3: + #_ REGISTER_IN v3 [80008000, 80008000, 80008000, 80008000] + #_ REGISTER_IN v4 [80008000, 80008000, 80008000, 80008000] + vavgsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [80008000, 80008000, 80008000, 80008000] + #_ REGISTER_OUT v4 [80008000, 80008000, 80008000, 80008000] + #_ REGISTER_OUT v5 [80008000, 80008000, 80008000, 80008000] + +test_vavgsh_4: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vavgsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] + +test_vavgsh_5: + #_ REGISTER_IN v3 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000] + vavgsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v5 [00010001, 00010001, 00010001, 00010001] diff --git a/src/xenia/cpu/ppc/testing/instr_vavgsw.s b/src/xenia/cpu/ppc/testing/instr_vavgsw.s new file mode 100644 index 000000000..9f612c6eb --- /dev/null +++ b/src/xenia/cpu/ppc/testing/instr_vavgsw.s @@ -0,0 +1,44 @@ +test_vavgsw_1: + #_ REGISTER_IN v3 [00000002, 00000004, 00000006, 00000008] + #_ REGISTER_IN v4 [00000001, 00000003, 00000005, 00000007] + vavgsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000002, 00000004, 00000006, 00000008] + #_ REGISTER_OUT v4 [00000001, 00000003, 00000005, 00000007] + #_ REGISTER_OUT v5 [00000002, 00000004, 00000006, 00000008] + +test_vavgsw_2: + #_ REGISTER_IN v3 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] + #_ REGISTER_IN v4 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] + vavgsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] + #_ REGISTER_OUT v4 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] + #_ REGISTER_OUT v5 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] + +test_vavgsw_3: + #_ REGISTER_IN v3 [80000000, 80000000, 80000000, 80000000] + #_ REGISTER_IN v4 [80000000, 80000000, 80000000, 80000000] + vavgsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [80000000, 80000000, 80000000, 80000000] + #_ REGISTER_OUT v4 [80000000, 80000000, 80000000, 80000000] + #_ REGISTER_OUT v5 [80000000, 80000000, 80000000, 80000000] + +test_vavgsw_4: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vavgsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] + +test_vavgsw_5: + #_ REGISTER_IN v3 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000] + vavgsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v5 [00000001, 00000001, 00000001, 00000001] diff --git a/src/xenia/cpu/ppc/testing/instr_vavgub.s b/src/xenia/cpu/ppc/testing/instr_vavgub.s new file mode 100644 index 000000000..93fc09379 --- /dev/null +++ b/src/xenia/cpu/ppc/testing/instr_vavgub.s @@ -0,0 +1,44 @@ +test_vavgub_1: + #_ REGISTER_IN v3 [02040608, 0A0C0E10, 12141618, 1A1C1E20] + #_ REGISTER_IN v4 [01030507, 090B0D0F, 11131517, 191B1D1F] + vavgub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [02040608, 0A0C0E10, 12141618, 1A1C1E20] + #_ REGISTER_OUT v4 [01030507, 090B0D0F, 11131517, 191B1D1F] + #_ REGISTER_OUT v5 [02040608, 0A0C0E10, 12141618, 1A1C1E20] + +test_vavgub_2: + #_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vavgub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vavgub_3: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000] + vavgub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] + +test_vavgub_4: + #_ REGISTER_IN v3 [80808080, 80808080, 80808080, 80808080] + #_ REGISTER_IN v4 [80808080, 80808080, 80808080, 80808080] + vavgub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [80808080, 80808080, 80808080, 80808080] + #_ REGISTER_OUT v4 [80808080, 80808080, 80808080, 80808080] + #_ REGISTER_OUT v5 [80808080, 80808080, 80808080, 80808080] + +test_vavgub_5: + #_ REGISTER_IN v3 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000] + vavgub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v5 [01010101, 01010101, 01010101, 01010101] diff --git a/src/xenia/cpu/ppc/testing/instr_vavguh.s b/src/xenia/cpu/ppc/testing/instr_vavguh.s index 196c343ac..925fbd0a1 100644 --- a/src/xenia/cpu/ppc/testing/instr_vavguh.s +++ b/src/xenia/cpu/ppc/testing/instr_vavguh.s @@ -6,3 +6,39 @@ test_vavguh_1: #_ REGISTER_OUT v3 [00000001, 00020003, 00040005, 00060007] #_ REGISTER_OUT v4 [00080009, 000A000B, 000C000D, 000E000F] #_ REGISTER_OUT v5 [00040005, 00060007, 00080009, 000A000B] + +test_vavguh_2: + #_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vavguh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vavguh_3: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000] + vavguh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] + +test_vavguh_4: + #_ REGISTER_IN v3 [80008000, 80008000, 80008000, 80008000] + #_ REGISTER_IN v4 [80008000, 80008000, 80008000, 80008000] + vavguh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [80008000, 80008000, 80008000, 80008000] + #_ REGISTER_OUT v4 [80008000, 80008000, 80008000, 80008000] + #_ REGISTER_OUT v5 [80008000, 80008000, 80008000, 80008000] + +test_vavguh_5: + #_ REGISTER_IN v3 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000] + vavguh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v5 [00010001, 00010001, 00010001, 00010001] diff --git a/src/xenia/cpu/ppc/testing/instr_vavguw.s b/src/xenia/cpu/ppc/testing/instr_vavguw.s new file mode 100644 index 000000000..1b614da8f --- /dev/null +++ b/src/xenia/cpu/ppc/testing/instr_vavguw.s @@ -0,0 +1,44 @@ +test_vavguw_1: + #_ REGISTER_IN v3 [00000002, 00000004, 00000006, 00000008] + #_ REGISTER_IN v4 [00000001, 00000003, 00000005, 00000007] + vavguw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000002, 00000004, 00000006, 00000008] + #_ REGISTER_OUT v4 [00000001, 00000003, 00000005, 00000007] + #_ REGISTER_OUT v5 [00000002, 00000004, 00000006, 00000008] + +test_vavguw_2: + #_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vavguw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vavguw_3: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000] + vavguw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] + +test_vavguw_4: + #_ REGISTER_IN v3 [80000000, 80000000, 80000000, 80000000] + #_ REGISTER_IN v4 [80000000, 80000000, 80000000, 80000000] + vavguw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [80000000, 80000000, 80000000, 80000000] + #_ REGISTER_OUT v4 [80000000, 80000000, 80000000, 80000000] + #_ REGISTER_OUT v5 [80000000, 80000000, 80000000, 80000000] + +test_vavguw_5: + #_ REGISTER_IN v3 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000] + vavguw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v5 [00000001, 00000001, 00000001, 00000001] diff --git a/src/xenia/cpu/ppc/testing/instr_vmaxsb.s b/src/xenia/cpu/ppc/testing/instr_vmaxsb.s new file mode 100644 index 000000000..1a115ec42 --- /dev/null +++ b/src/xenia/cpu/ppc/testing/instr_vmaxsb.s @@ -0,0 +1,44 @@ +test_vmaxsb_1: + #_ REGISTER_IN v3 [01020304, 05060708, 090A0B0C, 0D0E0F10] + #_ REGISTER_IN v4 [10090807, 06050403, 02010011, 12131415] + vmaxsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [01020304, 05060708, 090A0B0C, 0D0E0F10] + #_ REGISTER_OUT v4 [10090807, 06050403, 02010011, 12131415] + #_ REGISTER_OUT v5 [10090807, 06060708, 090A0B11, 12131415] + +test_vmaxsb_2: + #_ REGISTER_IN v3 [7F7F7F7F, 7F7F7F7F, 7F7F7F7F, 7F7F7F7F] + #_ REGISTER_IN v4 [01010101, 01010101, 01010101, 01010101] + vmaxsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [7F7F7F7F, 7F7F7F7F, 7F7F7F7F, 7F7F7F7F] + #_ REGISTER_OUT v4 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v5 [7F7F7F7F, 7F7F7F7F, 7F7F7F7F, 7F7F7F7F] + +test_vmaxsb_3: + #_ REGISTER_IN v3 [80808080, 80808080, 80808080, 80808080] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vmaxsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [80808080, 80808080, 80808080, 80808080] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vmaxsb_4: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vmaxsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] + +test_vmaxsb_5: + #_ REGISTER_IN v3 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_IN v4 [01010101, 01010101, 01010101, 01010101] + vmaxsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v4 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v5 [01010101, 01010101, 01010101, 01010101] diff --git a/src/xenia/cpu/ppc/testing/instr_vmaxsh.s b/src/xenia/cpu/ppc/testing/instr_vmaxsh.s index 80f47c5ca..6467960b0 100644 --- a/src/xenia/cpu/ppc/testing/instr_vmaxsh.s +++ b/src/xenia/cpu/ppc/testing/instr_vmaxsh.s @@ -15,3 +15,39 @@ test_vmaxsh_2: #_ REGISTER_OUT v3 [00000009, 0002000B, 0004000D, 0006000F] #_ REGISTER_OUT v4 [00080001, 000A0003, 000C0005, 000E0007] #_ REGISTER_OUT v5 [00080009, 000A000B, 000C000D, 000E000F] + +test_vmaxsh_3: + #_ REGISTER_IN v3 [7FFF7FFF, 7FFF7FFF, 7FFF7FFF, 7FFF7FFF] + #_ REGISTER_IN v4 [00010001, 00010001, 00010001, 00010001] + vmaxsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [7FFF7FFF, 7FFF7FFF, 7FFF7FFF, 7FFF7FFF] + #_ REGISTER_OUT v4 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v5 [7FFF7FFF, 7FFF7FFF, 7FFF7FFF, 7FFF7FFF] + +test_vmaxsh_4: + #_ REGISTER_IN v3 [80008000, 80008000, 80008000, 80008000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vmaxsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [80008000, 80008000, 80008000, 80008000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vmaxsh_5: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vmaxsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] + +test_vmaxsh_6: + #_ REGISTER_IN v3 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_IN v4 [00010001, 00010001, 00010001, 00010001] + vmaxsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v4 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v5 [00010001, 00010001, 00010001, 00010001] diff --git a/src/xenia/cpu/ppc/testing/instr_vmaxsw.s b/src/xenia/cpu/ppc/testing/instr_vmaxsw.s new file mode 100644 index 000000000..db143fa1b --- /dev/null +++ b/src/xenia/cpu/ppc/testing/instr_vmaxsw.s @@ -0,0 +1,44 @@ +test_vmaxsw_1: + #_ REGISTER_IN v3 [00000001, 00000002, 00000003, 00000004] + #_ REGISTER_IN v4 [00000004, 00000003, 00000002, 00000001] + vmaxsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000001, 00000002, 00000003, 00000004] + #_ REGISTER_OUT v4 [00000004, 00000003, 00000002, 00000001] + #_ REGISTER_OUT v5 [00000004, 00000003, 00000003, 00000004] + +test_vmaxsw_2: + #_ REGISTER_IN v3 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] + #_ REGISTER_IN v4 [00000001, 00000001, 00000001, 00000001] + vmaxsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] + #_ REGISTER_OUT v4 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v5 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] + +test_vmaxsw_3: + #_ REGISTER_IN v3 [80000000, 80000000, 80000000, 80000000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vmaxsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [80000000, 80000000, 80000000, 80000000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vmaxsw_4: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vmaxsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] + +test_vmaxsw_5: + #_ REGISTER_IN v3 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_IN v4 [00000001, 00000001, 00000001, 00000001] + vmaxsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v4 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v5 [00000001, 00000001, 00000001, 00000001] diff --git a/src/xenia/cpu/ppc/testing/instr_vmaxub.s b/src/xenia/cpu/ppc/testing/instr_vmaxub.s new file mode 100644 index 000000000..dcfa71a4f --- /dev/null +++ b/src/xenia/cpu/ppc/testing/instr_vmaxub.s @@ -0,0 +1,35 @@ +test_vmaxub_1: + #_ REGISTER_IN v3 [01020304, 05060708, 090A0B0C, 0D0E0F10] + #_ REGISTER_IN v4 [10090807, 06050403, 02010011, 12131415] + vmaxub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [01020304, 05060708, 090A0B0C, 0D0E0F10] + #_ REGISTER_OUT v4 [10090807, 06050403, 02010011, 12131415] + #_ REGISTER_OUT v5 [10090807, 06060708, 090A0B11, 12131415] + +test_vmaxub_2: + #_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_IN v4 [01010101, 01010101, 01010101, 01010101] + vmaxub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v4 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vmaxub_3: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [80808080, 80808080, 80808080, 80808080] + vmaxub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [80808080, 80808080, 80808080, 80808080] + #_ REGISTER_OUT v5 [80808080, 80808080, 80808080, 80808080] + +test_vmaxub_4: + #_ REGISTER_IN v3 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_IN v4 [01010101, 01010101, 01010101, 01010101] + vmaxub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v4 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v5 [01010101, 01010101, 01010101, 01010101] diff --git a/src/xenia/cpu/ppc/testing/instr_vmaxuh.s b/src/xenia/cpu/ppc/testing/instr_vmaxuh.s index a12d26ff3..75f626ad2 100644 --- a/src/xenia/cpu/ppc/testing/instr_vmaxuh.s +++ b/src/xenia/cpu/ppc/testing/instr_vmaxuh.s @@ -15,3 +15,30 @@ test_vmaxuh_2: #_ REGISTER_OUT v3 [00000009, 0002000B, 0004000D, 0006000F] #_ REGISTER_OUT v4 [00080001, 000A0003, 000C0005, 000E0007] #_ REGISTER_OUT v5 [00080009, 000A000B, 000C000D, 000E000F] + +test_vmaxuh_3: + #_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_IN v4 [00010001, 00010001, 00010001, 00010001] + vmaxuh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v4 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vmaxuh_4: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [80008000, 80008000, 80008000, 80008000] + vmaxuh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [80008000, 80008000, 80008000, 80008000] + #_ REGISTER_OUT v5 [80008000, 80008000, 80008000, 80008000] + +test_vmaxuh_5: + #_ REGISTER_IN v3 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_IN v4 [00010001, 00010001, 00010001, 00010001] + vmaxuh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v4 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v5 [00010001, 00010001, 00010001, 00010001] diff --git a/src/xenia/cpu/ppc/testing/instr_vmaxuw.s b/src/xenia/cpu/ppc/testing/instr_vmaxuw.s new file mode 100644 index 000000000..c265bce97 --- /dev/null +++ b/src/xenia/cpu/ppc/testing/instr_vmaxuw.s @@ -0,0 +1,35 @@ +test_vmaxuw_1: + #_ REGISTER_IN v3 [00000001, 00000002, 00000003, 00000004] + #_ REGISTER_IN v4 [00000004, 00000003, 00000002, 00000001] + vmaxuw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000001, 00000002, 00000003, 00000004] + #_ REGISTER_OUT v4 [00000004, 00000003, 00000002, 00000001] + #_ REGISTER_OUT v5 [00000004, 00000003, 00000003, 00000004] + +test_vmaxuw_2: + #_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_IN v4 [00000001, 00000001, 00000001, 00000001] + vmaxuw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v4 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vmaxuw_3: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [80000000, 80000000, 80000000, 80000000] + vmaxuw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [80000000, 80000000, 80000000, 80000000] + #_ REGISTER_OUT v5 [80000000, 80000000, 80000000, 80000000] + +test_vmaxuw_4: + #_ REGISTER_IN v3 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_IN v4 [00000001, 00000001, 00000001, 00000001] + vmaxuw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v4 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v5 [00000001, 00000001, 00000001, 00000001] diff --git a/src/xenia/cpu/ppc/testing/instr_vminsb.s b/src/xenia/cpu/ppc/testing/instr_vminsb.s new file mode 100644 index 000000000..e1077d5b2 --- /dev/null +++ b/src/xenia/cpu/ppc/testing/instr_vminsb.s @@ -0,0 +1,44 @@ +test_vminsb_1: + #_ REGISTER_IN v3 [01020304, 05060708, 090A0B0C, 0D0E0F10] + #_ REGISTER_IN v4 [10090807, 06050403, 02010011, 12131415] + vminsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [01020304, 05060708, 090A0B0C, 0D0E0F10] + #_ REGISTER_OUT v4 [10090807, 06050403, 02010011, 12131415] + #_ REGISTER_OUT v5 [01020304, 05050403, 0201000C, 0D0E0F10] + +test_vminsb_2: + #_ REGISTER_IN v3 [7F7F7F7F, 7F7F7F7F, 7F7F7F7F, 7F7F7F7F] + #_ REGISTER_IN v4 [01010101, 01010101, 01010101, 01010101] + vminsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [7F7F7F7F, 7F7F7F7F, 7F7F7F7F, 7F7F7F7F] + #_ REGISTER_OUT v4 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v5 [01010101, 01010101, 01010101, 01010101] + +test_vminsb_3: + #_ REGISTER_IN v3 [80808080, 80808080, 80808080, 80808080] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vminsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [80808080, 80808080, 80808080, 80808080] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [80808080, 80808080, 80808080, 80808080] + +test_vminsb_4: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vminsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vminsb_5: + #_ REGISTER_IN v3 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_IN v4 [01010101, 01010101, 01010101, 01010101] + vminsb v5, v3, v4 + blr + #_ REGISTER_OUT v3 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v4 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v5 [01010101, 01010101, 01010101, 01010101] diff --git a/src/xenia/cpu/ppc/testing/instr_vminsh.s b/src/xenia/cpu/ppc/testing/instr_vminsh.s index 3f69e0df1..c02c4c969 100644 --- a/src/xenia/cpu/ppc/testing/instr_vminsh.s +++ b/src/xenia/cpu/ppc/testing/instr_vminsh.s @@ -15,3 +15,39 @@ test_vminsh_2: #_ REGISTER_OUT v3 [00000009, 0002000B, 0004000D, 0006000F] #_ REGISTER_OUT v4 [00080001, 000A0003, 000C0005, 000E0007] #_ REGISTER_OUT v5 [00000001, 00020003, 00040005, 00060007] + +test_vminsh_3: + #_ REGISTER_IN v3 [7FFF7FFF, 7FFF7FFF, 7FFF7FFF, 7FFF7FFF] + #_ REGISTER_IN v4 [00010001, 00010001, 00010001, 00010001] + vminsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [7FFF7FFF, 7FFF7FFF, 7FFF7FFF, 7FFF7FFF] + #_ REGISTER_OUT v4 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v5 [00010001, 00010001, 00010001, 00010001] + +test_vminsh_4: + #_ REGISTER_IN v3 [80008000, 80008000, 80008000, 80008000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vminsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [80008000, 80008000, 80008000, 80008000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [80008000, 80008000, 80008000, 80008000] + +test_vminsh_5: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vminsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vminsh_6: + #_ REGISTER_IN v3 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_IN v4 [00010001, 00010001, 00010001, 00010001] + vminsh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v4 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v5 [00010001, 00010001, 00010001, 00010001] diff --git a/src/xenia/cpu/ppc/testing/instr_vminsw.s b/src/xenia/cpu/ppc/testing/instr_vminsw.s new file mode 100644 index 000000000..2a12a4fda --- /dev/null +++ b/src/xenia/cpu/ppc/testing/instr_vminsw.s @@ -0,0 +1,44 @@ +test_vminsw_1: + #_ REGISTER_IN v3 [00000001, 00000002, 00000003, 00000004] + #_ REGISTER_IN v4 [00000004, 00000003, 00000002, 00000001] + vminsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000001, 00000002, 00000003, 00000004] + #_ REGISTER_OUT v4 [00000004, 00000003, 00000002, 00000001] + #_ REGISTER_OUT v5 [00000001, 00000002, 00000002, 00000001] + +test_vminsw_2: + #_ REGISTER_IN v3 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] + #_ REGISTER_IN v4 [00000001, 00000001, 00000001, 00000001] + vminsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] + #_ REGISTER_OUT v4 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v5 [00000001, 00000001, 00000001, 00000001] + +test_vminsw_3: + #_ REGISTER_IN v3 [80000000, 80000000, 80000000, 80000000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vminsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [80000000, 80000000, 80000000, 80000000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [80000000, 80000000, 80000000, 80000000] + +test_vminsw_4: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + vminsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vminsw_5: + #_ REGISTER_IN v3 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_IN v4 [00000001, 00000001, 00000001, 00000001] + vminsw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v4 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v5 [00000001, 00000001, 00000001, 00000001] diff --git a/src/xenia/cpu/ppc/testing/instr_vminub.s b/src/xenia/cpu/ppc/testing/instr_vminub.s new file mode 100644 index 000000000..92c8807ba --- /dev/null +++ b/src/xenia/cpu/ppc/testing/instr_vminub.s @@ -0,0 +1,35 @@ +test_vminub_1: + #_ REGISTER_IN v3 [01020304, 05060708, 090A0B0C, 0D0E0F10] + #_ REGISTER_IN v4 [10090807, 06050403, 02010011, 12131415] + vminub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [01020304, 05060708, 090A0B0C, 0D0E0F10] + #_ REGISTER_OUT v4 [10090807, 06050403, 02010011, 12131415] + #_ REGISTER_OUT v5 [01020304, 05050403, 0201000C, 0D0E0F10] + +test_vminub_2: + #_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_IN v4 [01010101, 01010101, 01010101, 01010101] + vminub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v4 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v5 [01010101, 01010101, 01010101, 01010101] + +test_vminub_3: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [80808080, 80808080, 80808080, 80808080] + vminub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [80808080, 80808080, 80808080, 80808080] + #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] + +test_vminub_4: + #_ REGISTER_IN v3 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_IN v4 [01010101, 01010101, 01010101, 01010101] + vminub v5, v3, v4 + blr + #_ REGISTER_OUT v3 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v4 [01010101, 01010101, 01010101, 01010101] + #_ REGISTER_OUT v5 [01010101, 01010101, 01010101, 01010101] diff --git a/src/xenia/cpu/ppc/testing/instr_vminuh.s b/src/xenia/cpu/ppc/testing/instr_vminuh.s index aaac24240..cf289cc89 100644 --- a/src/xenia/cpu/ppc/testing/instr_vminuh.s +++ b/src/xenia/cpu/ppc/testing/instr_vminuh.s @@ -15,3 +15,30 @@ test_vminuh_2: #_ REGISTER_OUT v3 [00000009, 0002000B, 0004000D, 0006000F] #_ REGISTER_OUT v4 [00080001, 000A0003, 000C0005, 000E0007] #_ REGISTER_OUT v5 [00000001, 00020003, 00040005, 00060007] + +test_vminuh_3: + #_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_IN v4 [00010001, 00010001, 00010001, 00010001] + vminuh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v4 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v5 [00010001, 00010001, 00010001, 00010001] + +test_vminuh_4: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [80008000, 80008000, 80008000, 80008000] + vminuh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [80008000, 80008000, 80008000, 80008000] + #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] + +test_vminuh_5: + #_ REGISTER_IN v3 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_IN v4 [00010001, 00010001, 00010001, 00010001] + vminuh v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v4 [00010001, 00010001, 00010001, 00010001] + #_ REGISTER_OUT v5 [00010001, 00010001, 00010001, 00010001] diff --git a/src/xenia/cpu/ppc/testing/instr_vminuw.s b/src/xenia/cpu/ppc/testing/instr_vminuw.s new file mode 100644 index 000000000..c2e10322c --- /dev/null +++ b/src/xenia/cpu/ppc/testing/instr_vminuw.s @@ -0,0 +1,35 @@ +test_vminuw_1: + #_ REGISTER_IN v3 [00000001, 00000002, 00000003, 00000004] + #_ REGISTER_IN v4 [00000004, 00000003, 00000002, 00000001] + vminuw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000001, 00000002, 00000003, 00000004] + #_ REGISTER_OUT v4 [00000004, 00000003, 00000002, 00000001] + #_ REGISTER_OUT v5 [00000001, 00000002, 00000002, 00000001] + +test_vminuw_2: + #_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_IN v4 [00000001, 00000001, 00000001, 00000001] + vminuw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + #_ REGISTER_OUT v4 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v5 [00000001, 00000001, 00000001, 00000001] + +test_vminuw_3: + #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_IN v4 [80000000, 80000000, 80000000, 80000000] + vminuw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + #_ REGISTER_OUT v4 [80000000, 80000000, 80000000, 80000000] + #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] + +test_vminuw_4: + #_ REGISTER_IN v3 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_IN v4 [00000001, 00000001, 00000001, 00000001] + vminuw v5, v3, v4 + blr + #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v4 [00000001, 00000001, 00000001, 00000001] + #_ REGISTER_OUT v5 [00000001, 00000001, 00000001, 00000001]