diff --git a/premake5.lua b/premake5.lua index 19fbba4d4..7a8f08b48 100644 --- a/premake5.lua +++ b/premake5.lua @@ -27,6 +27,7 @@ includedirs({ }) defines({ + "VULKAN_HPP_NO_TO_STRING", "IMGUI_DISABLE_OBSOLETE_FUNCTIONS", "IMGUI_DISABLE_DEFAULT_FONT", --"IMGUI_USE_WCHAR32", diff --git a/src/xenia/app/emulator_window.cc b/src/xenia/app/emulator_window.cc index 129322739..1828ebe92 100644 --- a/src/xenia/app/emulator_window.cc +++ b/src/xenia/app/emulator_window.cc @@ -1809,7 +1809,7 @@ EmulatorWindow::ControllerHotKey EmulatorWindow::ProcessControllerHotkey( selected_title_index--; break; case ButtonFunctions::ToggleLogging: { - logging::internal::ToggleLogLevel(); + logging::ToggleLogLevel(); notificationTitle = "Toggle Logging"; diff --git a/src/xenia/base/logging.h b/src/xenia/base/logging.h index 0d0525ce8..709aaf3a5 100644 --- a/src/xenia/base/logging.h +++ b/src/xenia/base/logging.h @@ -89,7 +89,6 @@ constexpr char kPrefixCharInfo = 'i'; constexpr char kPrefixCharDebug = 'd'; void ToggleLogLevel(); -//bool ShouldLog(LogLevel log_level); bool ShouldLog(LogLevel log_level, uint32_t log_mask = xe::LogSrc::Uncategorized); namespace internal { @@ -124,7 +123,7 @@ XE_FORCEINLINE static void AppendLogLineFormat(uint32_t log_src_mask, const char prefix_char, std::string_view format, const Args&... args) noexcept { - if (!internal::ShouldLog(log_level, log_src_mask)) { + if (!ShouldLog(log_level, log_src_mask)) { return; } AppendLogLineFormat_Impl(log_level, prefix_char, format, args...); @@ -175,25 +174,29 @@ struct LoggerBatch { template XE_COLD void XELOGE(std::string_view format, const Args&... args) { - xe::logging::AppendLogLineFormat(xe::LogSrc::Uncategorized, xe::LogLevel::Error, + xe::logging::AppendLogLineFormat( + xe::LogSrc::Uncategorized, xe::LogLevel::Error, xe::logging::kPrefixCharError, format, args...); } template XE_COLD void XELOGW(std::string_view format, const Args&... args) { - xe::logging::AppendLogLineFormat(xe::LogSrc::Uncategorized, xe::LogLevel::Warning, + xe::logging::AppendLogLineFormat( + xe::LogSrc::Uncategorized, xe::LogLevel::Warning, xe::logging::kPrefixCharWarning, format, args...); } template void XELOGI(std::string_view format, const Args&... args) { - xe::logging::AppendLogLineFormat(xe::LogSrc::Uncategorized, xe::LogLevel::Info, + xe::logging::AppendLogLineFormat( + xe::LogSrc::Uncategorized, xe::LogLevel::Info, xe::logging::kPrefixCharInfo, format, args...); } template void XELOGD(std::string_view format, const Args&... args) { - xe::logging::AppendLogLineFormat(xe::LogSrc::Uncategorized, xe::LogLevel::Debug, + xe::logging::AppendLogLineFormat( + xe::LogSrc::Uncategorized, xe::LogLevel::Debug, xe::logging::kPrefixCharDebug, format, args...); } diff --git a/src/xenia/gpu/command_processor.cc b/src/xenia/gpu/command_processor.cc index 6a029db71..9eb5c253d 100644 --- a/src/xenia/gpu/command_processor.cc +++ b/src/xenia/gpu/command_processor.cc @@ -397,7 +397,7 @@ void CommandProcessor::EnableReadPointerWriteBack(uint32_t ptr, XE_NOINLINE XE_COLD void CommandProcessor::LogKickoffInitator(uint32_t value) { cpu::backend::GuestPseudoStackTrace st; - if (logging::internal::ShouldLog(LogLevel::Debug) && + if (logging::ShouldLog(LogLevel::Debug) && kernel_state_->processor()->backend()->PopulatePseudoStacktrace(&st)) { logging::LoggerBatch log_initiator{}; diff --git a/src/xenia/gpu/d3d12/deferred_command_list.cc b/src/xenia/gpu/d3d12/deferred_command_list.cc index 44b23ace5..b0f0f49f0 100644 --- a/src/xenia/gpu/d3d12/deferred_command_list.cc +++ b/src/xenia/gpu/d3d12/deferred_command_list.cc @@ -32,8 +32,8 @@ void DeferredCommandList::Execute(ID3D12GraphicsCommandList* command_list, #if XE_GPU_FINE_GRAINED_DRAW_SCOPES SCOPE_profile_cpu_f("gpu"); #endif // XE_GPU_FINE_GRAINED_DRAW_SCOPES - const uintmax_t* stream = command_stream_.data(); - size_t stream_remaining = command_stream_.size(); + const uintmax_t* stream = (const uintmax_t*)command_stream_.data(); + size_t stream_remaining = command_stream_.size() / sizeof(uintmax_t); ID3D12PipelineState* current_pipeline_state = nullptr; while (stream_remaining != 0) { const CommandHeader& header = diff --git a/src/xenia/gpu/registers.h b/src/xenia/gpu/registers.h index 4aec14f99..9bac466d3 100644 --- a/src/xenia/gpu/registers.h +++ b/src/xenia/gpu/registers.h @@ -131,14 +131,14 @@ union alignas(uint32_t) SQ_PROGRAM_CNTL { // Ignore the Freedreno a2xx.xml note about the bit 7 for zero registers, // the fields are 6-bit, not 8-bit, in yamato_registers.h, and games never // set the bits 7:6. - uint32_t vs_num_reg : 6; // +0, value minus 1 - uint32_t _pad_6 : 2; // +6 - uint32_t ps_num_reg : 6; // +8, value minus 1 - uint32_t _pad_14 : 2; // +14 - uint32_t vs_resource : 1; // +16 - uint32_t ps_resource : 1; // +17 - uint32_t param_gen : 1; // +18 - uint32_t gen_index_pix : 1; // +19 + uint32_t vs_num_reg : 6; // +0, value minus 1 + uint32_t _pad_6 : 2; // +6 + uint32_t ps_num_reg : 6; // +8, value minus 1 + uint32_t _pad_14 : 2; // +14 + uint32_t vs_resource : 1; // +16 + uint32_t ps_resource : 1; // +17 + uint32_t param_gen : 1; // +18 + uint32_t gen_index_pix : 1; // +19 // Interpolator output count minus 1. uint32_t vs_export_count : 4; // +20, value minus 1 xenos::VertexShaderExportMode vs_export_mode : 3; // +24 @@ -319,12 +319,12 @@ union alignas(uint32_t) VGT_DRAW_INITIATOR { // R600, it's set to the explicit mode mainly for tessellated draws in games // (because VGT_OUTPUT_PATH_CNTL where tessellation is enabled is ignored in // the implicit major mode). - xenos::MajorMode major_mode : 2; // +8 - uint32_t _pad_10 : 1; // +10 - xenos::IndexFormat index_size : 1; // +11 - uint32_t not_eop : 1; // +12 - uint32_t _pad_13 : 3; // +13 - uint32_t num_indices : 16; // +16 + xenos::MajorMode major_mode : 2; // +8 + uint32_t _pad_10 : 1; // +10 + xenos::IndexFormat index_size : 1; // +11 + uint32_t not_eop : 1; // +12 + uint32_t _pad_13 : 3; // +13 + uint32_t num_indices : 16; // +16 }; static constexpr Register register_index = XE_GPU_REG_VGT_DRAW_INITIATOR; }; @@ -496,7 +496,7 @@ union alignas(uint32_t) PA_SU_VTX_CNTL { xenos::PixelCenter pix_center : 1; // +0 xenos::VertexRounding round_mode : 2; // +1 xenos::VertexQuantization quant_mode : 3; // +3 - uint32_t _pad_6 : 26; // +6 + uint32_t _pad_6 : 26; // +6 }; static constexpr Register register_index = XE_GPU_REG_PA_SU_VTX_CNTL; };