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[a64] Fix AND_NOT_V128

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Operand order is wrong.
This commit is contained in:
Wunkolo 2024-05-10 19:57:38 -07:00
parent 87cca91405
commit 2e2f47f2de
1 changed files with 1 additions and 1 deletions
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2
src/xenia/cpu/backend/a64/a64_sequences.cc
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@ -2262,7 +2262,7 @@ struct AND_NOT_V128
static void Emit(A64Emitter& e, const EmitArgType& i) {
EmitCommutativeBinaryVOp(
e, i, [](A64Emitter& e, QReg dest, QReg src1, QReg src2) {
e.BIC(dest.B16(), src2.B16(), src1.B16());
e.BIC(dest.B16(), src1.B16(), src2.B16());
});
}
};