diff --git a/src/xenia/gpu/d3d12/d3d12_command_processor.cc b/src/xenia/gpu/d3d12/d3d12_command_processor.cc
index 96d200615..ecc80420f 100644
--- a/src/xenia/gpu/d3d12/d3d12_command_processor.cc
+++ b/src/xenia/gpu/d3d12/d3d12_command_processor.cc
@@ -888,7 +888,7 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(Endian index_endian) {
   // Z scale/offset is to convert from OpenGL NDC to Direct3D NDC if needed.
   // Also apply half-pixel offset to reproduce Direct3D 9 rasterization rules.
   // TODO(Triang3l): Check if pixel coordinates need to offset depending on a
-  // different register.
+  // different register (and if there's such register at all).
   bool gl_clip_space_def =
       !(pa_cl_clip_cntl & (1 << 19)) && (pa_cl_vte_cntl & (1 << 4));
   float ndc_scale_x = (pa_cl_vte_cntl & (1 << 0)) ? 1.0f : 1.0f / 1280.0f;
@@ -898,7 +898,7 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(Endian index_endian) {
   float ndc_offset_y = (pa_cl_vte_cntl & (1 << 3)) ? 0.0f : -1.0f;
   float ndc_offset_z = gl_clip_space_def ? 0.5f : 0.0f;
   float pixel_half_pixel_offset = 0.0f;
-  if (pa_su_vtx_cntl & (1 << 0)) {
+  if (!(pa_su_vtx_cntl & (1 << 0))) {
     if (pa_cl_vte_cntl & (1 << 0)) {
       float viewport_scale_x = regs[XE_GPU_REG_PA_CL_VPORT_XSCALE].f32;
       if (viewport_scale_x != 0.0f) {
@@ -910,10 +910,10 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(Endian index_endian) {
     if (pa_cl_vte_cntl & (1 << 2)) {
       float viewport_scale_y = regs[XE_GPU_REG_PA_CL_VPORT_YSCALE].f32;
       if (viewport_scale_y != 0.0f) {
-        ndc_offset_y += 0.5f / viewport_scale_y;
+        ndc_offset_y -= 0.5f / viewport_scale_y;
       }
     } else {
-      ndc_offset_y += 1.0f / 2560.0f;
+      ndc_offset_y -= 1.0f / 2560.0f;
     }
     pixel_half_pixel_offset = -0.5f;
   }