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[a64] Implement OPCODE_LOAD_VECTOR_SHR

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Wunkolo 2024-05-03 16:05:47 -07:00
parent 61feb6af74
commit 1b574be0e6
1 changed files with 5 additions and 8 deletions
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13
src/xenia/cpu/backend/a64/a64_seq_vector.cc
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@ -192,15 +192,12 @@ struct LOAD_VECTOR_SHR_I8
if (i.src1.is_constant) { if (i.src1.is_constant) {
auto sh = i.src1.constant(); auto sh = i.src1.constant();
assert_true(sh < xe::countof(lvsr_table)); assert_true(sh < xe::countof(lvsr_table));
// e.mov(e.rax, (uintptr_t)&lvsr_table[sh]); e.MOVP2R(X0, &lvsr_table[sh]);
// e.vmovaps(i.dest, e.ptr[e.rax]); e.LDR(i.dest, X0);
} else { } else {
// TODO(benvanik): find a cheaper way of doing this. e.MOVP2R(X0, lvsr_table);
// e.movzx(e.rdx, i.src1); e.AND(X1, i.src1.reg().toX(), 0xf);
// e.and_(e.dx, 0xF); e.LDR(i.dest, X0, X1, IndexExt::LSL, 4);
// e.shl(e.dx, 4);
// e.mov(e.rax, (uintptr_t)lvsr_table);
// e.vmovaps(i.dest, e.ptr[e.rax + e.rdx]);
} }
} }
}; };