diff --git a/src/alloy/backend/x64/lowering/lowering_sequences.cc b/src/alloy/backend/x64/lowering/lowering_sequences.cc
index b9fd38a77..fd85ac495 100644
--- a/src/alloy/backend/x64/lowering/lowering_sequences.cc
+++ b/src/alloy/backend/x64/lowering/lowering_sequences.cc
@@ -1219,8 +1219,6 @@ table->AddSequence(OPCODE_STORE, [](X64Emitter& e, Instr*& i) {
           }
           e.EndOp(src2);
         }
-        // eh?
-        e.bswap(e.r8);
         CallNative(e, cbs->write);
         i = e.Advance(i);
         return true;
diff --git a/src/xenia/apu/audio_system.cc b/src/xenia/apu/audio_system.cc
index 1793fc92d..46b0b3924 100644
--- a/src/xenia/apu/audio_system.cc
+++ b/src/xenia/apu/audio_system.cc
@@ -187,10 +187,11 @@ uint64_t AudioSystem::ReadRegister(uint64_t addr) {
   XELOGAPU("ReadRegister(%.4X)", r);
   // 1800h is read on startup and stored -- context? buffers?
   // 1818h is read during a lock?
-  return 0;
+  return XESWAP32BE(0);
 }
 
 void AudioSystem::WriteRegister(uint64_t addr, uint64_t value) {
+  value = XESWAP32BE((uint32_t)value);
   uint32_t r = addr & 0xFFFF;
   XELOGAPU("WriteRegister(%.4X, %.8X)", r, value);
   // 1804h is written to with 0x02000000 and 0x03000000 around a lock operation
diff --git a/src/xenia/gpu/graphics_system.cc b/src/xenia/gpu/graphics_system.cc
index fbcb1d744..524ec467b 100644
--- a/src/xenia/gpu/graphics_system.cc
+++ b/src/xenia/gpu/graphics_system.cc
@@ -152,10 +152,11 @@ uint64_t GraphicsSystem::ReadRegister(uint64_t addr) {
   }
 
   XEASSERT(r >= 0 && r < kXEGpuRegisterCount);
-  return regs->values[r].u32;
+  return XESWAP32BE(regs->values[r].u32);
 }
 
 void GraphicsSystem::WriteRegister(uint64_t addr, uint64_t value) {
+  value = XESWAP32BE((uint32_t)value);
   uint32_t r = addr & 0xFFFF;
   XELOGGPU("WriteRegister(%.4X, %.8X)", r, value);