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[a64] Fix out-of-bounds OPCODE_VECTOR_SHL(all-same) case

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Out-of-bound shift-values are handled as modulo-element-size
This commit is contained in:
Wunkolo 2024-06-03 07:55:09 -07:00
parent 1127fd9525
commit 02edbd264d
1 changed files with 3 additions and 3 deletions
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6
src/xenia/cpu/backend/a64/a64_seq_vector.cc
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@ -539,7 +539,7 @@ struct VECTOR_SHL_V128
}
if (all_same) {
// Every count is the same, so we can use SHL
e.SHL(i.dest.reg().B16(), i.src1.reg().B16(), shamt.u8[0]);
e.SHL(i.dest.reg().B16(), i.src1.reg().B16(), shamt.u8[0] & 0x7);
return;
}
e.ADD(e.GetNativeParam(1), SP, e.StashConstantV(1, i.src2.constant()));
@ -563,7 +563,7 @@ struct VECTOR_SHL_V128
}
if (all_same) {
// Every count is the same, so we can use SHL
e.SHL(i.dest.reg().H8(), i.src1.reg().H8(), shamt.u8[0]);
e.SHL(i.dest.reg().H8(), i.src1.reg().H8(), shamt.u8[0] & 0xF);
return;
}
e.ADD(e.GetNativeParam(1), SP, e.StashConstantV(1, i.src2.constant()));
@ -587,7 +587,7 @@ struct VECTOR_SHL_V128
}
if (all_same) {
// Every count is the same, so we can use SHL
e.SHL(i.dest.reg().S4(), i.src1.reg().S4(), shamt.u8[0]);
e.SHL(i.dest.reg().S4(), i.src1.reg().S4(), shamt.u8[0] & 0x1F);
return;
}
e.ADD(e.GetNativeParam(1), SP, e.StashConstantV(1, i.src2.constant()));