mirror of
https://github.com/ttrftech/NanoVNA.git
synced 2025-12-06 03:31:59 +01:00
Move SPI bus macros to spi.h
This commit is contained in:
DiSlord
parent
17b229d90f
commit
89da23e45a
166
ili9341.c
166
ili9341.c
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@ -22,9 +22,22 @@
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#include "hal.h"
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#include "nanovna.h"
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#include "spi.h"
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// Allow enable DMA for read display data
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//#define __USE_DISPLAY_DMA_RX__
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// Pin macros for LCD
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#define LCD_CS_LOW palClearPad(GPIOB, GPIOB_LCD_CS)
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#define LCD_CS_HIGH palSetPad(GPIOB, GPIOB_LCD_CS)
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#define LCD_RESET_ASSERT palClearPad(GPIOA, GPIOA_LCD_RESET)
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#define LCD_RESET_NEGATE palSetPad(GPIOA, GPIOA_LCD_RESET)
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#define LCD_DC_CMD palClearPad(GPIOB, GPIOB_LCD_CD)
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#define LCD_DC_DATA palSetPad(GPIOB, GPIOB_LCD_CD)
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#define LCD_SPI SPI1
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// Set SPI bus speed for LCD
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#define LCD_SPI_SPEED SPI_BR_DIV2
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uint16_t spi_buffer[SPI_BUFFER_SIZE];
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// Default foreground & background colors
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uint16_t foreground_color = 0;
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@ -135,79 +148,6 @@ uint16_t background_color = 0;
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#define DISPLAY_ROTATION_0 (ILI9341_MADCTL_MV | ILI9341_MADCTL_BGR)
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#define DISPLAY_ROTATION_180 (ILI9341_MADCTL_MX | ILI9341_MADCTL_MY \
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| ILI9341_MADCTL_MV | ILI9341_MADCTL_BGR)
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//
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// Pin macros
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//
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#define RESET_ASSERT palClearPad(GPIOA, GPIOA_LCD_RESET)
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#define RESET_NEGATE palSetPad(GPIOA, GPIOA_LCD_RESET)
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#define CS_LOW palClearPad(GPIOB, GPIOB_LCD_CS)
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#define CS_HIGH palSetPad(GPIOB, GPIOB_LCD_CS)
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#define DC_CMD palClearPad(GPIOB, GPIOB_LCD_CD)
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#define DC_DATA palSetPad(GPIOB, GPIOB_LCD_CD)
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//*****************************************************************************
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//********************************** SPI bus **********************************
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//*****************************************************************************
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// STM32 SPI transfer mode:
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// in 8 bit mode:
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// if you write *(uint8_t*)(&SPI1->DR) = (uint8_t) data, then data send as << data
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// if you write *(uint16_t*)(&SPI1->DR) =(uint16_t) data, then data send as << dataLoByte, after send dataHiByte
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// in 16 bit mode
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// if you write *(uint16_t*)(&SPI1->DR) =(uint16_t) data, then data send as << data
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// SPI init in 8 bit mode
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#define SPI_CR2_8BIT 0x0700
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#define SPI_CR2_16BIT 0x0F00
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//*****************************************************
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// SPI bus baud rate (PPL/BR_DIV)
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//*****************************************************
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#define SPI_BR_DIV2 (0x00000000U)
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#define SPI_BR_DIV4 (SPI_CR1_BR_0)
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#define SPI_BR_DIV8 (SPI_CR1_BR_1)
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#define SPI_BR_DIV16 (SPI_CR1_BR_1|SPI_CR1_BR_0)
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#define SPI_BR_DIV32 (SPI_CR1_BR_2)
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#define SPI_BR_DIV64 (SPI_CR1_BR_2|SPI_CR1_BR_0)
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#define SPI_BR_DIV128 (SPI_CR1_BR_2|SPI_CR1_BR_1)
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#define SPI_BR_DIV256 (SPI_CR1_BR_2|SPI_CR1_BR_1|SPI_CR1_BR_0)
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// Set SPI bus speed for LCD
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#define LCD_SPI_SPEED SPI_BR_DIV2
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#define SPI_BR_SET(br) (SPI1->CR1 = (SPI1->CR1& ~(SPI_BR_DIV256))|br)
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//*****************************************************
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// SPI bus activity macros
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//*****************************************************
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// The RXNE flag is set depending on the FRXTH bit value in the SPIx_CR2 register:
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// • If FRXTH is set, RXNE goes high and stays high until the RXFIFO level is greater or equal to 1/4 (8-bit).
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#define SPI_RX_IS_NOT_EMPTY (SPI1->SR&SPI_SR_RXNE)
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#define SPI_RX_IS_EMPTY (((SPI1->SR&SPI_SR_RXNE) == 0))
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// The TXE flag is set when transmission TXFIFO has enough space to store data to send.
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// 0: Tx buffer not empty, bit is cleared automatically when the TXFIFO level becomes greater than 1/2
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// 1: Tx buffer empty, flag goes high and stays high until the TXFIFO level is lower or equal to 1/2 of the FIFO depth
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#define SPI_TX_IS_NOT_EMPTY (((SPI1->SR&(SPI_SR_TXE)) == 0))
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#define SPI_TX_IS_EMPTY (SPI1->SR&SPI_SR_TXE)
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// When BSY is set, it indicates that a data transfer is in progress on the SPI (the SPI bus is busy).
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#define SPI_IS_BUSY (SPI1->SR & SPI_SR_BSY)
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// Tx or Rx in process
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#define SPI_IN_TX_RX ((SPI1->SR & (SPI_SR_TXE | SPI_SR_RXNE)) == 0 || SPI_IS_BUSY)
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//*****************************************************
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// SPI send data macros
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//*****************************************************
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#define SPI_WRITE_8BIT(data) *(__IO uint8_t*)(&SPI1->DR) = (uint8_t) data
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#define SPI_WRITE_16BIT(data) *(__IO uint16_t*)(&SPI1->DR) = (uint16_t) data
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//*****************************************************
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// SPI read data macros
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//*****************************************************
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#define SPI_READ_8BIT *(__IO uint8_t*)(&SPI1->DR)
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#define SPI_READ_16BIT *(__IO uint16_t*)(&SPI1->DR)
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//*****************************************************
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// SPI DMA settings and data
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//*****************************************************
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@ -261,44 +201,44 @@ static void dmaStreamFlush(uint32_t len)
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// SPI transmit byte to SPI
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static void spi_TxByte(uint8_t data) {
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while (SPI_TX_IS_NOT_EMPTY);
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SPI_WRITE_8BIT(data);
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while (SPI_TX_IS_NOT_EMPTY(LCD_SPI));
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SPI_WRITE_8BIT(LCD_SPI, data);
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}
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// Transmit word to SPI bus (if SPI in 8 bit mode LSB send first!!!!!)
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static inline void spi_TxWord(uint16_t data) {
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while (SPI_TX_IS_NOT_EMPTY);
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SPI_WRITE_16BIT(data);
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while (SPI_TX_IS_NOT_EMPTY(LCD_SPI));
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SPI_WRITE_16BIT(LCD_SPI, data);
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}
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// Transmit byte to SPI bus (len should be > 0)
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static void spi_TxBuffer(uint8_t *buffer, uint16_t len) {
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do {
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while (SPI_TX_IS_NOT_EMPTY);
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SPI_WRITE_8BIT(*buffer++);
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while (SPI_TX_IS_NOT_EMPTY(LCD_SPI));
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SPI_WRITE_8BIT(LCD_SPI, *buffer++);
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}while(--len);
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}
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// Receive byte from SPI bus
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static uint8_t spi_RxByte(void) {
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// Start RX clock (by sending data)
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SPI_WRITE_8BIT(0xFF);
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while (SPI_RX_IS_EMPTY || SPI_IS_BUSY);
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return SPI_READ_8BIT;
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SPI_WRITE_8BIT(LCD_SPI, 0xFF);
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while (SPI_RX_IS_EMPTY(LCD_SPI) || SPI_IS_BUSY(LCD_SPI));
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return SPI_READ_8BIT(LCD_SPI);
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}
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// Receive byte from SPI bus (len should be > 0)
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static void spi_RxBuffer(uint8_t *buffer, uint16_t len) {
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do{
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SPI_WRITE_8BIT(0xFF);
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while (SPI_RX_IS_EMPTY);
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*buffer++ = SPI_READ_8BIT;
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SPI_WRITE_8BIT(LCD_SPI, 0xFF);
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while (SPI_RX_IS_EMPTY(LCD_SPI));
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*buffer++ = SPI_READ_8BIT(LCD_SPI);
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}while(--len);
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}
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static void spi_DropRx(void){
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// Drop Rx buffer after tx
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while (SPI_RX_IS_NOT_EMPTY)
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(void)SPI_READ_8BIT;
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while (SPI_RX_IS_NOT_EMPTY(LCD_SPI))
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(void)SPI_READ_8BIT(LCD_SPI);
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}
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#ifdef __USE_DISPLAY_DMA__
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@ -335,30 +275,30 @@ static void spi_DMARxBuffer(uint8_t *buffer, uint16_t len) {
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static void spi_init(void)
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{
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rccEnableSPI1(FALSE);
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SPI1->CR1 = 0;
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SPI1->CR1 = SPI_CR1_MSTR // SPI is MASTER
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LCD_SPI->CR1 = 0;
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LCD_SPI->CR1 = SPI_CR1_MSTR // SPI is MASTER
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| SPI_CR1_SSM // Software slave management (The external NSS pin is free for other application uses)
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| SPI_CR1_SSI // Internal slave select (This bit has an effect only when the SSM bit is set. Allow use NSS pin as I/O)
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| LCD_SPI_SPEED; // Baud rate control
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SPI1->CR2 = SPI_CR2_8BIT // SPI data size, set to 8 bit
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LCD_SPI->CR2 = SPI_CR2_8BIT // SPI data size, set to 8 bit
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| SPI_CR2_FRXTH; // SPI_SR_RXNE generated every 8 bit data
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// | SPI_CR2_SSOE; //
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#ifdef __USE_DISPLAY_DMA__
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// Tx DMA init
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dmaStreamAllocate(dmatx, STM32_SPI_SPI1_IRQ_PRIORITY, NULL, NULL);
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dmaStreamSetPeripheral(dmatx, &SPI1->DR);
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SPI1->CR2|= SPI_CR2_TXDMAEN; // Tx DMA enable
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dmaStreamSetPeripheral(dmatx, &LCD_SPI->DR);
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LCD_SPI->CR2|= SPI_CR2_TXDMAEN; // Tx DMA enable
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#ifdef __USE_DISPLAY_DMA_RX__
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// Rx DMA init
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dmaStreamAllocate(dmarx, STM32_SPI_SPI1_IRQ_PRIORITY, NULL, NULL);
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dmaStreamSetPeripheral(dmarx, &SPI1->DR);
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dmaStreamSetPeripheral(dmarx, &LCD_SPI->DR);
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// Enable DMA on SPI
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SPI1->CR2|= SPI_CR2_RXDMAEN; // Rx DMA enable
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LCD_SPI->CR2|= SPI_CR2_RXDMAEN; // Rx DMA enable
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#endif
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#endif
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SPI1->CR1|= SPI_CR1_SPE; //SPI enable
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LCD_SPI->CR1|= SPI_CR1_SPE; //SPI enable
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}
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// Disable inline for this function
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@ -366,20 +306,20 @@ static void send_command(uint8_t cmd, uint8_t len, const uint8_t *data)
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{
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// Uncomment on low speed SPI (possible get here before previous tx complete)
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// while (SPI_IN_TX_RX);
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CS_LOW;
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DC_CMD;
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SPI_WRITE_8BIT(cmd);
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LCD_CS_LOW;
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LCD_DC_CMD;
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SPI_WRITE_8BIT(LCD_SPI, cmd);
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// Need wait transfer complete and set data bit
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while (SPI_IN_TX_RX)
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while (SPI_IN_TX_RX(LCD_SPI))
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;
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// Send command data (if need)
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DC_DATA;
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LCD_DC_DATA;
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while (len-- > 0) {
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while (SPI_TX_IS_NOT_EMPTY)
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while (SPI_TX_IS_NOT_EMPTY(LCD_SPI))
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;
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SPI_WRITE_8BIT(*data++);
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SPI_WRITE_8BIT(LCD_SPI, *data++);
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}
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//CS_HIGH;
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//LCD_CS_HIGH;
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}
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static const uint8_t ili9341_init_seq[] = {
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@ -443,10 +383,10 @@ static const uint8_t ili9341_init_seq[] = {
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void ili9341_init(void)
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{
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spi_init();
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DC_DATA;
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RESET_ASSERT;
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LCD_DC_DATA;
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LCD_RESET_ASSERT;
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chThdSleepMilliseconds(10);
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RESET_NEGATE;
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LCD_RESET_NEGATE;
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const uint8_t *p;
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for (p = ili9341_init_seq; *p; ) {
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send_command(p[0], p[1], &p[2]);
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@ -560,7 +500,7 @@ void ili9341_read_memory(int x, int y, int w, int h, int len, uint16_t *out)
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b = spi_RxByte();
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*out++ = RGB565(r, g, b);
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}
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CS_HIGH;
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LCD_CS_HIGH;
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}
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#else
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@ -594,7 +534,7 @@ void ili9341_read_memory(int x, int y, int w, int h, int len, uint16_t *out)
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// Wait DMA completion
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dmaWaitCompletion(dmatx);
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dmaWaitCompletion(dmarx);
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CS_HIGH;
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LCD_CS_HIGH;
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// Parce recived data
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// Skip dummy 8-bit read
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@ -966,6 +906,8 @@ void ili9341_test(int mode)
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// Define sector size
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#define SD_SECTOR_SIZE 512
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// SD card spi bus
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#define SD_SPI SPI1
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// Define SD SPI speed on work
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#define SD_SPI_SPEED SPI_BR_DIV2
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// div4 give less error and high speed for Rx
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@ -1003,15 +945,15 @@ int shell_printf(const char *fmt, ...);
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#define SD_CS_HIGH palSetPad(GPIOB, GPIOB_SD_CS)
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static void SD_Select_SPI(uint32_t speed) {
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CS_HIGH; // Unselect LCD
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SPI_BR_SET(speed); // Set Baud rate control for SD card
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LCD_CS_HIGH; // Unselect LCD
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SPI_BR_SET(SD_SPI, speed); // Set Baud rate control for SD card
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SD_CS_LOW; // Select SD Card
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}
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static void SD_Unselect_SPI(void) {
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SD_CS_HIGH; // Unselect SD Card
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spi_RxByte(); // Dummy read/write one Byte recommend for SD after CS up
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SPI_BR_SET(LCD_SPI_SPEED); // Restore Baud rate for LCD
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SPI_BR_SET(LCD_SPI, LCD_SPI_SPEED); // Restore Baud rate for LCD
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}
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//*******************************************************
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@ -1231,7 +1173,7 @@ static uint8_t SD_SendCmd(uint8_t cmd, uint32_t arg) {
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// Power on SD
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static void SD_PowerOn(void) {
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uint16_t n;
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CS_HIGH;
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LCD_CS_HIGH;
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// Dummy TxRx 80 bits for power up SD
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for (n=0;n<10;n++)
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spi_RxByte();
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79
spi.h
Normal file
79
spi.h
Normal file
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@ -0,0 +1,79 @@
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/*
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* Copyright (c) 2019-2020, Dmitry (DiSlord) dislordlive@gmail.com
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* All rights reserved.
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3, or (at your option)
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* any later version.
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*
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* The software is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GNU Radio; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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//*****************************************************************************
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//********************************** SPI1 bus *********************************
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//*****************************************************************************
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// STM32 SPI transfer mode:
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// in 8 bit mode:
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// if you write *(uint8_t*)(&SPI1->DR) = (uint8_t) data, then data send as << data
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// if you write *(uint16_t*)(&SPI1->DR) =(uint16_t) data, then data send as << dataLoByte, after send dataHiByte
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// in 16 bit mode
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// if you write *(uint16_t*)(&SPI1->DR) =(uint16_t) data, then data send as << data
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// SPI init in 8 bit mode
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#define SPI_CR2_8BIT 0x0700
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#define SPI_CR2_16BIT 0x0F00
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//*****************************************************
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// SPI bus baud rate (PPL/BR_DIV)
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//*****************************************************
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#define SPI_BR_DIV2 (0x00000000U)
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#define SPI_BR_DIV4 (SPI_CR1_BR_0)
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#define SPI_BR_DIV8 (SPI_CR1_BR_1)
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#define SPI_BR_DIV16 (SPI_CR1_BR_1|SPI_CR1_BR_0)
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#define SPI_BR_DIV32 (SPI_CR1_BR_2)
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#define SPI_BR_DIV64 (SPI_CR1_BR_2|SPI_CR1_BR_0)
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#define SPI_BR_DIV128 (SPI_CR1_BR_2|SPI_CR1_BR_1)
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#define SPI_BR_DIV256 (SPI_CR1_BR_2|SPI_CR1_BR_1|SPI_CR1_BR_0)
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#define SPI_BR_SET(spi, br) (spi->CR1 = (spi->CR1& ~(SPI_BR_DIV256))|br)
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//*****************************************************
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// SPI bus activity macros
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//*****************************************************
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// The RXNE flag is set depending on the FRXTH bit value in the SPIx_CR2 register:
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// • If FRXTH is set, RXNE goes high and stays high until the RXFIFO level is greater or equal to 1/4 (8-bit).
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#define SPI_RX_IS_NOT_EMPTY(spi) (spi->SR&SPI_SR_RXNE)
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#define SPI_RX_IS_EMPTY(spi) (((spi->SR&SPI_SR_RXNE) == 0))
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// The TXE flag is set when transmission TXFIFO has enough space to store data to send.
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// 0: Tx buffer not empty, bit is cleared automatically when the TXFIFO level becomes greater than 1/2
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// 1: Tx buffer empty, flag goes high and stays high until the TXFIFO level is lower or equal to 1/2 of the FIFO depth
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#define SPI_TX_IS_NOT_EMPTY(spi) (((spi->SR&(SPI_SR_TXE)) == 0))
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#define SPI_TX_IS_EMPTY(spi) (spi->SR&SPI_SR_TXE)
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// When BSY is set, it indicates that a data transfer is in progress on the SPI (the SPI bus is busy).
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#define SPI_IS_BUSY(spi) (spi->SR & SPI_SR_BSY)
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// Tx or Rx in process
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#define SPI_IN_TX_RX(spi) ((spi->SR & (SPI_SR_TXE | SPI_SR_RXNE)) == 0 || SPI_IS_BUSY(spi))
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//*****************************************************
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// SPI send data macros
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//*****************************************************
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#define SPI_WRITE_8BIT(spi, data) *(__IO uint8_t*)(&spi->DR) = (uint8_t) data
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#define SPI_WRITE_16BIT(spi, data) *(__IO uint16_t*)(&spi->DR) = (uint16_t) data
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//*****************************************************
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// SPI read data macros
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//*****************************************************
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#define SPI_READ_8BIT(spi) *(__IO uint8_t*)(&spi->DR)
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#define SPI_READ_16BIT(spi) *(__IO uint16_t*)(&spi->DR)
|
||||
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Reference in a new issue