mirror of
https://github.com/ttrftech/NanoVNA.git
synced 2025-12-06 03:31:59 +01:00
Add sin_cos table for 6 or 12kHz offset for dsp
Add support direct clock for AIC3204 from si5351 Now possible made calibration and not reset old calibration data, just made another calibration (not need reset or disable correction). Open - Short calibration depend from self, need recalibrate it together. Load calibration possible made alone Isoln, Thru also depend from self, need recalibrate it together.
This commit is contained in:
DiSlord
parent
b3de8f0160
commit
237a329226
24
dsp.c
24
dsp.c
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@ -27,7 +27,7 @@ int16_t ref_buf[SAMPLE_LEN];
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#endif
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#ifdef USE_VARIABLE_OFFSET
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int16_t sincos_tbl[AUDIO_SAMPLES_COUNT][2];
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static int16_t sincos_tbl[AUDIO_SAMPLES_COUNT][2];
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void generate_DSP_Table(int offset){
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float audio_freq = AUDIO_ADC_FREQ;
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// N = offset * AUDIO_SAMPLES_COUNT / audio_freq; should be integer
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@ -41,9 +41,25 @@ void generate_DSP_Table(int offset){
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v+=step;
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}
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}
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#elif FREQUENCY_OFFSET==6000*(AUDIO_ADC_FREQ/AUDIO_SAMPLES_COUNT/1000)
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// static Table for 12kHz IF and 96kHz ADC (or 6kHz IF and 48kHz ADC) audio ADC
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static const int16_t sincos_tbl[48][2] = {
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{ 6393, 32138}, { 27246, 18205}, { 32138,-6393}, { 18205,-27246},
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{-6393,-32138}, {-27246,-18205}, {-32138, 6393}, {-18205, 27246},
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{ 6393, 32138}, { 27246, 18205}, { 32138,-6393}, { 18205,-27246},
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{-6393,-32138}, {-27246,-18205}, {-32138, 6393}, {-18205, 27246},
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{ 6393, 32138}, { 27246, 18205}, { 32138,-6393}, { 18205,-27246},
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{-6393,-32138}, {-27246,-18205}, {-32138, 6393}, {-18205, 27246},
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{ 6393, 32138}, { 27246, 18205}, { 32138,-6393}, { 18205,-27246},
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{-6393,-32138}, {-27246,-18205}, {-32138, 6393}, {-18205, 27246},
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{ 6393, 32138}, { 27246, 18205}, { 32138,-6393}, { 18205,-27246},
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{-6393,-32138}, {-27246,-18205}, {-32138, 6393}, {-18205, 27246},
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{ 6393, 32138}, { 27246, 18205}, { 32138,-6393}, { 18205,-27246},
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{-6393,-32138}, {-27246,-18205}, {-32138, 6393}, {-18205, 27246}
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};
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#elif FREQUENCY_OFFSET==5000*(AUDIO_ADC_FREQ/AUDIO_SAMPLES_COUNT/1000)
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// static Table for 10kHz IF and 96kHz ADC (or 5kHz IF and 48kHz ADC) audio ADC
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const int16_t sincos_tbl[48][2] = {
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static const int16_t sincos_tbl[48][2] = {
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{ 10533, 31029 }, { 27246, 18205 }, { 32698, -2143 }, { 24636, -21605 },
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{ 6393, -32138 }, {-14493, -29389 }, {-29389, -14493 }, {-32138, 6393 },
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{-21605, 24636 }, { -2143, 32698 }, { 18205, 27246 }, { 31029, 10533 },
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@ -59,7 +75,7 @@ const int16_t sincos_tbl[48][2] = {
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};
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#elif FREQUENCY_OFFSET==4000*(AUDIO_ADC_FREQ/AUDIO_SAMPLES_COUNT/1000)
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// static Table for 8kHz IF and 96kHz audio ADC (or 4kHz IF and 48kHz ADC) audio ADC
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const int16_t sincos_tbl[48][2] = {
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static const int16_t sincos_tbl[48][2] = {
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{ 4277, 32488}, { 19948, 25997}, { 30274, 12540}, { 32488, -4277},
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{ 25997,-19948}, { 12540,-30274}, { -4277,-32488}, {-19948,-25997},
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{-30274,-12540}, {-32488, 4277}, {-25997, 19948}, {-12540, 30274},
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@ -75,7 +91,7 @@ const int16_t sincos_tbl[48][2] = {
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};
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#elif FREQUENCY_OFFSET==3000*(AUDIO_ADC_FREQ/AUDIO_SAMPLES_COUNT/1000)
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// static Table for 6kHz IF and 96kHz audio ADC (or 3kHz IF and 48kHz ADC) audio ADC
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const int16_t sincos_tbl[48][2] = {
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static const int16_t sincos_tbl[48][2] = {
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{ 3212, 32610}, { 15447, 28899}, { 25330, 20788}, { 31357, 9512},
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{ 32610, -3212}, { 28899,-15447}, { 20788,-25330}, { 9512,-31357},
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{ -3212,-32610}, {-15447,-28899}, {-25330,-20788}, {-31357, -9512},
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64
main.c
64
main.c
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@ -80,13 +80,11 @@ static uint16_t get_sweep_mode(void);
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static void cal_interpolate(int s);
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static void update_frequencies(void);
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static void set_frequencies(uint32_t start, uint32_t stop, uint16_t points);
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static bool sweep(bool break_on_operation);
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static bool sweep(bool break_on_operation, uint16_t sweep_mode);
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static void transform_domain(void);
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static int32_t my_atoi(const char *p);
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static uint32_t my_atoui(const char *p);
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#define FREQ_HARMONICS (config.harmonic_freq_threshold)
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// Obsolete, always use interpolate
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#define cal_auto_interpolate TRUE
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@ -128,7 +126,7 @@ static THD_FUNCTION(Thread1, arg)
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while (1) {
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bool completed = false;
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if (sweep_mode&(SWEEP_ENABLE|SWEEP_ONCE)) {
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completed = sweep(true);
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completed = sweep(true, get_sweep_mode());
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sweep_mode&=~SWEEP_ONCE;
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} else {
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__WFI();
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@ -335,7 +333,7 @@ VNA_SHELL_FUNCTION(cmd_reset)
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;
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}
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const uint8_t gain_table[][2] = {
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static const uint8_t gain_table[][2] = {
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{ 0, 0 }, // 1st: 0 ~ 300MHz
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{ 50, 50 }, // 2nd: 300 ~ 900MHz
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{ 75, 75 }, // 3th: 900 ~ 1500MHz
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@ -642,18 +640,15 @@ VNA_SHELL_FUNCTION(cmd_capture)
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// read pixel count at one time (PART*2 bytes required for read buffer)
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(void)argc;
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(void)argv;
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int i, y;
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int y;
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#if SPI_BUFFER_SIZE < (3*LCD_WIDTH + 1)
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#error "Low size of spi_buffer for cmd_capture"
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#endif
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// read 2 row pixel time (read buffer limit by 2/3 + 1 from spi_buffer size)
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for (y = 0; y < LCD_HEIGHT; y += 2) {
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// use uint16_t spi_buffer[2048] (defined in ili9341) for read buffer
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uint8_t *buf = (uint8_t *)spi_buffer;
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ili9341_read_memory(0, y, LCD_WIDTH, 2, 2 * LCD_WIDTH, spi_buffer);
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for (i = 0; i < 4 * LCD_WIDTH; i++) {
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streamPut(shell_stream, *buf++);
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}
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streamWrite(shell_stream, (void*)spi_buffer, 2 * LCD_WIDTH * sizeof(uint16_t));
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}
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}
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@ -841,12 +836,11 @@ static uint16_t get_sweep_mode(void){
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}
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// main loop for measurement
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bool sweep(bool break_on_operation)
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bool sweep(bool break_on_operation, uint16_t sweep_mode)
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{
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int delay;
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uint16_t sweep_mode = SWEEP_CH0_MEASURE|SWEEP_CH1_MEASURE;
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if (p_sweep>=sweep_points || break_on_operation == false) RESET_SWEEP;
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if (break_on_operation && (sweep_mode = get_sweep_mode()) == 0)
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if (break_on_operation && sweep_mode == 0)
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return false;
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// blink LED while scanning
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@ -870,7 +864,7 @@ bool sweep(bool break_on_operation)
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}
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if (sweep_mode & SWEEP_CH1_MEASURE){
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tlv320aic3204_select(1); // CH1:TRANSMISSION, reset and begin measure
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DSP_START(st_delay+delay);
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DSP_START(delay+st_delay);
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//================================================
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// Place some code thats need execute while delay
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//================================================
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@ -936,15 +930,18 @@ VNA_SHELL_FUNCTION(cmd_scan)
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}
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sweep_points = points;
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}
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uint16_t mask = 0;
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uint16_t sweep_mode = SWEEP_CH0_MEASURE|SWEEP_CH1_MEASURE;
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if (argc == 4) {
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mask = my_atoui(argv[3]);
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sweep_mode = (mask>>1)&3;
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}
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set_frequencies(start, stop, points);
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if (cal_auto_interpolate && (cal_status & CALSTAT_APPLY))
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cal_interpolate(lastsaveid);
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pause_sweep();
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sweep(false);
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sweep(false, sweep_mode);
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// Output data after if set (faster data recive)
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if (argc == 4) {
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uint16_t mask = my_atoui(argv[3]);
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if (mask) {
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for (i = 0; i < points; i++) {
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if (mask & 1) shell_printf("%u ", frequencies[i]);
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@ -954,7 +951,6 @@ VNA_SHELL_FUNCTION(cmd_scan)
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}
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}
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}
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}
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static void
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update_marker_index(void)
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@ -1403,28 +1399,30 @@ static void apply_edelay(void)
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void
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cal_collect(int type)
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{
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ensure_edit_config();
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//ensure_edit_config();
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active_props = ¤t_props;
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int dst, src;
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switch (type) {
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case CAL_LOAD: cal_status|= CALSTAT_LOAD; dst = CAL_LOAD; src = 0; break;
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case CAL_OPEN: cal_status|= CALSTAT_OPEN; dst = CAL_OPEN; src = 0; cal_status&= ~(CALSTAT_ES|CALSTAT_APPLY); break;
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case CAL_SHORT: cal_status|= CALSTAT_SHORT; dst = CAL_SHORT; src = 0; cal_status&= ~(CALSTAT_ER|CALSTAT_APPLY); break;
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case CAL_OPEN: cal_status|= CALSTAT_OPEN; dst = CAL_OPEN; src = 0; cal_status&= ~(CALSTAT_ES); break;
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case CAL_SHORT: cal_status|= CALSTAT_SHORT; dst = CAL_SHORT; src = 0; cal_status&= ~(CALSTAT_ER); break;
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case CAL_THRU: cal_status|= CALSTAT_THRU; dst = CAL_THRU; src = 1; break;
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case CAL_ISOLN: cal_status|= CALSTAT_ISOLN; dst = CAL_ISOLN; src = 1; break;
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default:
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return;
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}
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// Run sweep for collect data (use minimum BANDWIDTH_100, or bigger if set)
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// Run sweep for collect data (use minimum BANDWIDTH_30, or bigger if set)
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uint8_t bw = config.bandwidth; // store current setting
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if (bw < BANDWIDTH_100)
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config.bandwidth = BANDWIDTH_100;
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uint16_t status = cal_status;
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if (bw < BANDWIDTH_30)
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config.bandwidth = BANDWIDTH_30;
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cal_status&= ~(CALSTAT_APPLY);
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// Set MAX settings for sweep_points on calibrate
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// if (sweep_points != POINTS_COUNT)
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// set_sweep_points(POINTS_COUNT);
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sweep(false);
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sweep(false, src == 0 ? SWEEP_CH0_MEASURE : SWEEP_CH1_MEASURE);
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config.bandwidth = bw; // restore
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cal_status = status;
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// Copy calibration data
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memcpy(cal_data[dst], measured[src], sizeof measured[0]);
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redraw_request |= REDRAW_CAL_STATUS;
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@ -1448,8 +1446,9 @@ cal_done(void)
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eterm_set(ETERM_ES, 0.0, 0.0);
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cal_status &= ~CALSTAT_SHORT;
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eterm_calc_er(-1);
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} else {
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} else if (!(cal_status & CALSTAT_ER)){
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eterm_set(ETERM_ER, 1.0, 0.0);
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} else if (!(cal_status & CALSTAT_ES)) {
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eterm_set(ETERM_ES, 0.0, 0.0);
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}
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@ -1457,7 +1456,7 @@ cal_done(void)
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eterm_set(ETERM_EX, 0.0, 0.0);
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if (cal_status & CALSTAT_THRU) {
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eterm_calc_et();
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} else {
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} else if (!(cal_status & CALSTAT_ET)) {
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eterm_set(ETERM_ET, 1.0, 0.0);
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}
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@ -2021,13 +2020,14 @@ VNA_SHELL_FUNCTION(cmd_test)
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//extern int touch_x, touch_y;
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//shell_printf("adc: %d %d\r\n", touch_x, touch_y);
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#endif
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#if 0
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while (argc > 1) {
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int x, y;
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int16_t x, y;
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touch_position(&x, &y);
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shell_printf("touch: %d %d\r\n", x, y);
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chThdSleepMilliseconds(200);
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}
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#endif
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}
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VNA_SHELL_FUNCTION(cmd_gain)
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@ -120,9 +120,13 @@ extern const char *info_about[];
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// 5ms @ 96kHz
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// Define aic3204 source clock frequency (for 8MHz used fractional multiplier, and possible little phase error)
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//#define AUDIO_CLOCK_REF ( 8000000U)
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#define AUDIO_CLOCK_REF (10752000U)
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//#define AUDIO_CLOCK_REF (10752000U)
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// Disable AIC PLL clock, use input as CODEC_CLKIN
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#define AUDIO_CLOCK_REF (86016000U)
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// Define ADC sample rate
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#define AUDIO_ADC_FREQ (96000)
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//#define AUDIO_ADC_FREQ (48000)
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// Define sample count for one step measure
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#define AUDIO_SAMPLES_COUNT (48)
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// Buffer contain left and right channel samples (need x2)
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@ -511,7 +515,6 @@ void adc_init(void);
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uint16_t adc_single_read(uint32_t chsel);
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void adc_start_analog_watchdogd(uint32_t chsel);
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void adc_stop(void);
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void adc_interrupt(void);
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int16_t adc_vbat_read(void);
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/*
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@ -112,29 +112,37 @@ static const uint8_t conf_data[] = {
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// reg, data, // PLL clock config
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0x00, 0x00, // Initialize to Page 0
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0x01, 0x01, // Initialize the device through software reset
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0x04, 0x03, // PLL Clock Low (80MHz - 137MHz), MCLK, PLL
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//=======================================================
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// Configure PLL clock
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// PLL_CLKIN * R * J.D
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// PLL_CLK = ---------------------
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// P
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#if AUDIO_CLOCK_REF == 8000000U
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// 8.000MHz * 10.7520 = 86.016MHz,
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// MCLK = 8.000MHz * 10.7520 = 86.016MHz,
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0x04, 0x03, // PLL Clock Low (80MHz - 137MHz), MCLK pin is input to PLL, PLL as CODEC_CLKIN
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0x05, 0x91, // Power up PLL, P=1,R=1
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0x06, 0x0a, // J=10
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0x07, 0x1D, // D=7520 = 0x1D60
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0x08, 0x60,
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#elif AUDIO_CLOCK_REF == 10752000U
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// 10.752MHz * 4 * 2.0 / 1 = 86.016MHz
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// MCLK = 10.752MHz * 4 * 2.0 / 1 = 86.016MHz
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0x04, 0x03, // PLL Clock Low (80MHz - 137MHz),MCLK pin is input to PLL, PLL as CODEC_CLKIN
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0x05, 0x94, // Power up PLL, P=1,R=4
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0x06, 0x02, // J=2
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0x07, 0x00, // D=0
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0x08, 0x00,
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#elif AUDIO_CLOCK_REF == 86016000U
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// MCLK = 86.016MHz
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0x04, 0x00, // MCLK as CODEC_CLKIN
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0x05, 0x00, // Power down PLL
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0x06, 0x00, // J=0
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0x07, 0x00, // D=0
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0x08, 0x00,
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#else
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#error "Need set correct PLL multiplier for aic3204"
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#error "Need set correct CODEC_CLKIN for aic3204"
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#endif
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// Configure ADC clock
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// PLL_CLK
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// CODEC_CLKIN
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// ADC_fs = --------------------
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// NADC * MADC * AOSR
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#if AUDIO_ADC_FREQ == 48000
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@ -200,7 +208,7 @@ static const uint8_t conf_data[] = {
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static const uint8_t conf_data_unmute[] = {
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// reg, data,
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0x00, 0x00, // Select Page 0
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0x51, 0xc0, // Power up Left and Right ADC Channels
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0x51, 0xc2, // Power up Left and Right ADC Channels, ADC Volume Control Soft-Stepping disabled
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0x52, 0x00, // Unmute Left and Right ADC Digital Volume Control
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0x00, 0x01, // Select Page 1 (should be set as default)
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};
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