2014-09-06 04:48:37 +02:00
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///*! \file sched_waveform.c
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// * \brief Schedule Wavefrom Streams
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// *
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// * \copyright Copyright 2012-2014 FlexRadio Systems. All Rights Reserved.
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// * Unauthorized use, duplication or distribution of this software is
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// * strictly prohibited by law.
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// *
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// * \date 29-AUG-2014
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2015-01-29 01:15:54 +01:00
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// * \author Ed Gonzalez
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// * \mangler Graham / KE9H
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2014-09-06 04:48:37 +02:00
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// *
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// */
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/* *****************************************************************************
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*
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* Copyright (C) 2014 FlexRadio Systems.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* Contact Information:
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* email: gpl<at>flexradiosystems.com
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* Mail: FlexRadio Systems, Suite 1-150, 4616 W. Howard LN, Austin, TX 78728
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*
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* ************************************************************************** */
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#include <stdlib.h>
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#include <pthread.h>
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#include <semaphore.h>
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#include <string.h> // for memset
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#include <unistd.h>
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2015-06-11 16:20:37 +02:00
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#include <fcntl.h>
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#include <stdio.h>
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#include <ctype.h>
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2014-09-06 04:48:37 +02:00
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#include "common.h"
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#include "datatypes.h"
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#include "hal_buffer.h"
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#include "sched_waveform.h"
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#include "vita_output.h"
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2015-05-28 00:19:27 +02:00
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#include "thumbDV.h"
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2015-06-10 18:07:16 +02:00
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#include "bit_pattern_matcher.h"
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2015-06-11 16:20:37 +02:00
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#include "dstar.h"
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2015-06-11 18:31:29 +02:00
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#include "DStarDefines.h"
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2015-06-10 18:07:16 +02:00
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2014-09-06 04:48:37 +02:00
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//static Queue sched_fft_queue;
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static pthread_rwlock_t _list_lock;
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static BufferDescriptor _root;
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static pthread_t _waveform_thread;
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static BOOL _waveform_thread_abort = FALSE;
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static sem_t sched_waveform_sem;
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static void _dsp_convertBufEndian(BufferDescriptor buf_desc)
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{
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int i;
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if(buf_desc->sample_size != 8)
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{
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//TODO: horrendous error here
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return;
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}
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for(i = 0; i < buf_desc->num_samples*2; i++)
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((int32*)buf_desc->buf_ptr)[i] = htonl(((int32*)buf_desc->buf_ptr)[i]);
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}
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static BufferDescriptor _WaveformList_UnlinkHead(void)
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{
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BufferDescriptor buf_desc = NULL;
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pthread_rwlock_wrlock(&_list_lock);
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if (_root == NULL || _root->next == NULL)
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{
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output("Attempt to unlink from a NULL head");
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pthread_rwlock_unlock(&_list_lock);
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return NULL;
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}
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if(_root->next != _root)
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buf_desc = _root->next;
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if(buf_desc != NULL)
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{
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// make sure buffer exists and is actually linked
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if(!buf_desc || !buf_desc->prev || !buf_desc->next)
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{
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output( "Invalid buffer descriptor");
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buf_desc = NULL;
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}
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else
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{
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buf_desc->next->prev = buf_desc->prev;
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buf_desc->prev->next = buf_desc->next;
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buf_desc->next = NULL;
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buf_desc->prev = NULL;
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}
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}
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pthread_rwlock_unlock(&_list_lock);
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return buf_desc;
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}
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static void _WaveformList_LinkTail(BufferDescriptor buf_desc)
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{
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pthread_rwlock_wrlock(&_list_lock);
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buf_desc->next = _root;
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buf_desc->prev = _root->prev;
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_root->prev->next = buf_desc;
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_root->prev = buf_desc;
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pthread_rwlock_unlock(&_list_lock);
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}
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void sched_waveform_Schedule(BufferDescriptor buf_desc)
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{
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_WaveformList_LinkTail(buf_desc);
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sem_post(&sched_waveform_sem);
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}
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void sched_waveform_signal()
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{
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sem_post(&sched_waveform_sem);
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}
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/* *********************************************************************************************
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* *********************************************************************************************
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2015-01-29 01:15:54 +01:00
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* ********************* ***********************
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* ********************* LOCATION OF MODULATOR / DEMODULATOR INTERFACE ***********************
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* ********************* ***********************
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2014-09-06 04:48:37 +02:00
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* *********************************************************************************************
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2015-01-29 01:15:54 +01:00
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* ****************************************************************************************** */
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2014-09-06 04:48:37 +02:00
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#include <stdio.h>
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#include "circular_buffer.h"
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#include "resampler.h"
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2015-06-03 19:53:50 +02:00
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#include "gmsk_modem.h"
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2014-09-06 04:48:37 +02:00
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#define PACKET_SAMPLES 128
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2015-06-02 00:30:00 +02:00
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#define DV_PACKET_SAMPLES 160
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2014-09-06 04:48:37 +02:00
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2015-06-02 00:30:00 +02:00
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#define SCALE_AMBE 32767.0f
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//
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//#define SCALE_RX_IN 32767.0f // Multiplier // Was 16000 GGH Jan 30, 2015
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//#define SCALE_RX_OUT 32767.0f // Divisor
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//#define SCALE_TX_IN 32767.0f // Multiplier // Was 16000 GGH Jan 30, 2015
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//#define SCALE_TX_OUT 32767.0f // Divisor
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#define SCALE_RX_IN SCALE_AMBE
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2015-06-02 01:10:34 +02:00
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#define SCALE_TX_OUT SCALE_AMBE
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2015-06-02 00:30:00 +02:00
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#define SCALE_RX_OUT SCALE_AMBE
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#define SCALE_TX_IN SCALE_AMBE
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2015-06-02 01:10:34 +02:00
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2014-09-06 04:48:37 +02:00
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#define FILTER_TAPS 48
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#define DECIMATION_FACTOR 3
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/* These are offsets for the input buffers to decimator */
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#define MEM_24 FILTER_TAPS /* Memory required in 24kHz buffer */
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#define MEM_8 FILTER_TAPS/DECIMATION_FACTOR /* Memory required in 8kHz buffer */
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// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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// Circular Buffer Declarations
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2015-06-02 00:30:00 +02:00
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float RX1_buff[(DV_PACKET_SAMPLES * 12)+1]; // RX1 Packet Input Buffer
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short RX2_buff[(DV_PACKET_SAMPLES * 12)+1]; // RX2 Vocoder input buffer
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short RX3_buff[(DV_PACKET_SAMPLES * 12)+1]; // RX3 Vocoder output buffer
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float RX4_buff[(DV_PACKET_SAMPLES * 12)+1]; // RX4 Packet output Buffer
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2014-09-06 04:48:37 +02:00
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2015-06-02 00:30:00 +02:00
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float TX1_buff[(DV_PACKET_SAMPLES * 12) +1]; // TX1 Packet Input Buffer
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short TX2_buff[(DV_PACKET_SAMPLES * 12)+1]; // TX2 Vocoder input buffer
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short TX3_buff[(DV_PACKET_SAMPLES * 12)+1]; // TX3 Vocoder output buffer
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2015-06-18 01:21:02 +02:00
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float TX4_buff[(DV_PACKET_SAMPLES * 12 * 10)+1]; // TX4 Packet output Buffer
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2014-09-06 04:48:37 +02:00
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circular_float_buffer rx1_cb;
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Circular_Float_Buffer RX1_cb = &rx1_cb;
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circular_short_buffer rx2_cb;
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Circular_Short_Buffer RX2_cb = &rx2_cb;
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circular_short_buffer rx3_cb;
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Circular_Short_Buffer RX3_cb = &rx3_cb;
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circular_float_buffer rx4_cb;
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Circular_Float_Buffer RX4_cb = &rx4_cb;
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circular_float_buffer tx1_cb;
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Circular_Float_Buffer TX1_cb = &tx1_cb;
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circular_short_buffer tx2_cb;
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Circular_Short_Buffer TX2_cb = &tx2_cb;
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circular_short_buffer tx3_cb;
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Circular_Short_Buffer TX3_cb = &tx3_cb;
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circular_float_buffer tx4_cb;
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Circular_Float_Buffer TX4_cb = &tx4_cb;
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2015-05-28 00:19:27 +02:00
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static int _dv_serial_fd = 0;
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2014-09-06 04:48:37 +02:00
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2015-06-03 19:53:50 +02:00
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static GMSK_DEMOD _gmsk_demod = NULL;
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static GMSK_MOD _gmsk_mod = NULL;
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2015-06-11 21:13:33 +02:00
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static DSTAR_MACHINE _dstar = NULL;
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2015-06-03 19:53:50 +02:00
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2015-06-18 01:04:43 +02:00
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static BOOL write_dat = TRUE;
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static uint32 data_i = 0;
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2015-06-12 18:13:46 +02:00
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#define FREEDV_NSAMPLES 160
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2014-09-06 04:48:37 +02:00
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static void* _sched_waveform_thread(void* param)
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{
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2015-06-12 17:57:38 +02:00
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int nout;
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2014-09-06 04:48:37 +02:00
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int i; // for loop counter
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float fsample; // a float sample
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2015-02-05 18:29:02 +01:00
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// float Sig2Noise; // Signal to noise ratio
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2014-09-06 04:48:37 +02:00
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// Flags ...
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2015-01-29 01:15:54 +01:00
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int initial_tx = 1; // Flags for TX circular buffer, clear if starting transmit
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int initial_rx = 1; // Flags for RX circular buffer, clear if starting receive
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2014-09-06 04:48:37 +02:00
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// VOCODER I/O BUFFERS
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short speech_in[FREEDV_NSAMPLES];
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short speech_out[FREEDV_NSAMPLES];
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2015-06-12 17:57:38 +02:00
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//short demod_in[FREEDV_NSAMPLES];
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2014-09-06 04:48:37 +02:00
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short mod_out[FREEDV_NSAMPLES];
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2015-06-12 17:57:38 +02:00
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//unsigned char packet_out[FREEDV_NSAMPLES];
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2015-05-29 00:02:48 +02:00
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2014-09-06 04:48:37 +02:00
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// RX RESAMPLER I/O BUFFERS
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2015-06-02 00:30:00 +02:00
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float float_in_8k[DV_PACKET_SAMPLES + FILTER_TAPS];
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2015-06-12 17:57:38 +02:00
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//float float_out_8k[DV_PACKET_SAMPLES];
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2014-09-06 04:48:37 +02:00
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2015-06-02 00:30:00 +02:00
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float float_in_24k[DV_PACKET_SAMPLES * DECIMATION_FACTOR + FILTER_TAPS];
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float float_out_24k[DV_PACKET_SAMPLES * DECIMATION_FACTOR ];
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2014-09-06 04:48:37 +02:00
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// TX RESAMPLER I/O BUFFERS
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2015-06-02 00:30:00 +02:00
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float tx_float_in_8k[DV_PACKET_SAMPLES + FILTER_TAPS];
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float tx_float_out_8k[DV_PACKET_SAMPLES];
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2014-09-06 04:48:37 +02:00
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2015-06-02 00:30:00 +02:00
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float tx_float_in_24k[DV_PACKET_SAMPLES * DECIMATION_FACTOR + FILTER_TAPS];
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float tx_float_out_24k[DV_PACKET_SAMPLES * DECIMATION_FACTOR ];
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2014-09-06 04:48:37 +02:00
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2015-06-18 01:04:43 +02:00
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2014-09-06 04:48:37 +02:00
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// ======================= Initialization Section =========================
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2015-05-27 23:47:10 +02:00
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2015-05-28 20:00:48 +02:00
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thumbDV_init("/dev/ttyUSB0", &_dv_serial_fd);
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2014-09-06 04:48:37 +02:00
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// Initialize the Circular Buffers
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RX1_cb->size = PACKET_SAMPLES*6 +1; // size = no.elements in array+1
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RX1_cb->start = 0;
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RX1_cb->end = 0;
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RX1_cb->elems = RX1_buff;
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RX2_cb->size = PACKET_SAMPLES*6 +1; // size = no.elements in array+1
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RX2_cb->start = 0;
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RX2_cb->end = 0;
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RX2_cb->elems = RX2_buff;
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RX3_cb->size = PACKET_SAMPLES*6 +1; // size = no.elements in array+1
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RX3_cb->start = 0;
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RX3_cb->end = 0;
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RX3_cb->elems = RX3_buff;
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RX4_cb->size = PACKET_SAMPLES*12 +1; // size = no.elements in array+1
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RX4_cb->start = 0;
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RX4_cb->end = 0;
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RX4_cb->elems = RX4_buff;
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TX1_cb->size = PACKET_SAMPLES*6 +1; // size = no.elements in array+1
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TX1_cb->start = 0;
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TX1_cb->end = 0;
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TX1_cb->elems = TX1_buff;
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TX2_cb->size = PACKET_SAMPLES*6 +1; // size = no.elements in array+1
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TX2_cb->start = 0;
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TX2_cb->end = 0;
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TX2_cb->elems = TX2_buff;
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TX3_cb->size = PACKET_SAMPLES *6 +1; // size = no.elements in array+1
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|
|
|
|
TX3_cb->start = 0;
|
|
|
|
|
TX3_cb->end = 0;
|
|
|
|
|
TX3_cb->elems = TX3_buff;
|
2015-06-18 01:21:02 +02:00
|
|
|
TX4_cb->size = PACKET_SAMPLES * (12*10) +1; // size = no.elements in array+1
|
2014-09-06 04:48:37 +02:00
|
|
|
TX4_cb->start = 0;
|
|
|
|
|
TX4_cb->end = 0;
|
|
|
|
|
TX4_cb->elems = TX4_buff;
|
|
|
|
|
|
|
|
|
|
initial_tx = TRUE;
|
|
|
|
|
initial_rx = TRUE;
|
|
|
|
|
|
|
|
|
|
// show that we are running
|
|
|
|
|
BufferDescriptor buf_desc;
|
2015-02-06 18:27:23 +01:00
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
while( !_waveform_thread_abort )
|
|
|
|
|
{
|
|
|
|
|
// wait for a buffer descriptor to get posted
|
|
|
|
|
sem_wait(&sched_waveform_sem);
|
|
|
|
|
|
|
|
|
|
if(!_waveform_thread_abort)
|
|
|
|
|
{
|
|
|
|
|
do {
|
|
|
|
|
buf_desc = _WaveformList_UnlinkHead();
|
2014-10-21 17:45:53 +02:00
|
|
|
// if we got signalled, but there was no new data, something's wrong
|
|
|
|
|
// and we'll just wait for the next packet
|
2014-09-06 04:48:37 +02:00
|
|
|
if (buf_desc == NULL)
|
|
|
|
|
{
|
|
|
|
|
//output( "We were signaled that there was another buffer descriptor, but there's not one here");
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
// convert the buffer to little endian
|
|
|
|
|
_dsp_convertBufEndian(buf_desc);
|
|
|
|
|
|
|
|
|
|
//output(" \"Processed\" buffer stream id = 0x%08X\n", buf_desc->stream_id);
|
|
|
|
|
|
|
|
|
|
if( (buf_desc->stream_id & 1) == 0) { //RX BUFFER
|
|
|
|
|
// If 'initial_rx' flag, clear buffers RX1, RX2, RX3, RX4
|
|
|
|
|
if(initial_rx)
|
|
|
|
|
{
|
|
|
|
|
RX1_cb->start = 0; // Clear buffers RX1, RX2, RX3, RX4
|
|
|
|
|
RX1_cb->end = 0;
|
|
|
|
|
RX2_cb->start = 0;
|
|
|
|
|
RX2_cb->end = 0;
|
|
|
|
|
RX3_cb->start = 0;
|
|
|
|
|
RX3_cb->end = 0;
|
|
|
|
|
RX4_cb->start = 0;
|
|
|
|
|
RX4_cb->end = 0;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Clear filter memory */
|
2015-02-05 18:38:54 +01:00
|
|
|
memset(float_in_24k, 0, MEM_24 * sizeof(float));
|
|
|
|
|
memset(float_in_8k, 0, MEM_8 * sizeof(float));
|
2014-09-06 04:48:37 +02:00
|
|
|
|
|
|
|
|
/* Requires us to set initial_rx to FALSE which we do at the end of
|
|
|
|
|
* the first loop
|
|
|
|
|
*/
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Set the transmit 'initial' flag
|
|
|
|
|
initial_tx = TRUE;
|
2015-06-18 01:04:43 +02:00
|
|
|
write_dat = TRUE;
|
2014-09-06 04:48:37 +02:00
|
|
|
|
|
|
|
|
// Check for new receiver input packet & move to RX1_cb.
|
|
|
|
|
// TODO - If transmit packet, discard here?
|
|
|
|
|
|
|
|
|
|
|
2015-02-05 18:39:37 +01:00
|
|
|
for( i = 0 ; i < PACKET_SAMPLES ; i++)
|
2014-09-06 04:48:37 +02:00
|
|
|
{
|
|
|
|
|
//output("Outputting ")
|
|
|
|
|
// fsample = Get next float from packet;
|
|
|
|
|
cbWriteFloat(RX1_cb, ((Complex*)buf_desc->buf_ptr)[i].real);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
2015-06-02 00:30:00 +02:00
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
// Check for >= 384 samples in RX1_cb and spin downsampler
|
|
|
|
|
// Convert to shorts and move to RX2_cb.
|
2015-06-02 00:30:00 +02:00
|
|
|
if(cfbContains(RX1_cb) >= DV_PACKET_SAMPLES * DECIMATION_FACTOR)
|
2014-09-06 04:48:37 +02:00
|
|
|
{
|
2015-06-10 18:07:16 +02:00
|
|
|
enum DEMOD_STATE state = DEMOD_UNKNOWN;
|
2015-06-02 00:30:00 +02:00
|
|
|
for(i=0 ; i< DV_PACKET_SAMPLES * DECIMATION_FACTOR ; i++)
|
2014-09-06 04:48:37 +02:00
|
|
|
{
|
2015-06-12 17:57:38 +02:00
|
|
|
state = gmsk_decode(_gmsk_demod, cbReadFloat(RX1_cb));
|
2015-06-11 16:20:37 +02:00
|
|
|
|
2015-06-11 21:13:33 +02:00
|
|
|
unsigned char ambe_out[9] = {0};
|
|
|
|
|
BOOL ambe_packet_out = FALSE;
|
|
|
|
|
if ( state == DEMOD_TRUE ) {
|
|
|
|
|
ambe_packet_out = dstar_stateMachine(_dstar, TRUE, ambe_out, 9);
|
|
|
|
|
} else if ( state == DEMOD_FALSE ) {
|
|
|
|
|
ambe_packet_out = dstar_stateMachine(_dstar, FALSE, ambe_out, 9);
|
|
|
|
|
} else {
|
|
|
|
|
/* Nothing to do since we have not "locked" a bit out yet */
|
|
|
|
|
}
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-06-12 01:35:05 +02:00
|
|
|
if ( ambe_packet_out == TRUE ) {
|
|
|
|
|
nout = 0;
|
|
|
|
|
nout = thumbDV_decode(_dv_serial_fd, ambe_out, speech_out, DV_PACKET_SAMPLES);
|
|
|
|
|
//if (nout) output(" %d \n", speech_out[i]);
|
2015-06-12 17:57:38 +02:00
|
|
|
for( i = 0 ; i < nout ; i++)
|
2015-06-12 01:35:05 +02:00
|
|
|
cbWriteShort(RX3_cb, speech_out[i]);
|
|
|
|
|
}
|
2014-09-06 04:48:37 +02:00
|
|
|
}
|
2015-06-12 01:35:05 +02:00
|
|
|
}
|
2015-05-27 23:47:10 +02:00
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
// Check for >= 128 samples in RX3_cb, convert to floats
|
|
|
|
|
// and spin the upsampler. Move output to RX4_cb.
|
|
|
|
|
|
2015-06-02 00:30:00 +02:00
|
|
|
if(csbContains(RX3_cb) >= DV_PACKET_SAMPLES)
|
2014-09-06 04:48:37 +02:00
|
|
|
{
|
2015-06-02 00:30:00 +02:00
|
|
|
for( i=0 ; i< DV_PACKET_SAMPLES ; i++)
|
2014-09-06 04:48:37 +02:00
|
|
|
{
|
2015-06-02 01:10:34 +02:00
|
|
|
float_in_8k[i+MEM_8] = ((float) (cbReadShort(RX3_cb) / SCALE_RX_OUT));
|
|
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
}
|
|
|
|
|
|
2015-06-02 00:30:00 +02:00
|
|
|
fdmdv_8_to_24(float_out_24k, &float_in_8k[MEM_8], DV_PACKET_SAMPLES);
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-06-02 00:30:00 +02:00
|
|
|
for( i=0 ; i< DV_PACKET_SAMPLES * DECIMATION_FACTOR ; i++)
|
2014-09-06 04:48:37 +02:00
|
|
|
{
|
|
|
|
|
cbWriteFloat(RX4_cb, float_out_24k[i]);
|
|
|
|
|
}
|
2015-02-05 18:29:02 +01:00
|
|
|
//Sig2Noise = (_freedvS->fdmdv_stats.snr_est);
|
2014-09-06 04:48:37 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Check for >= 128 samples in RX4_cb. Form packet and
|
|
|
|
|
// export.
|
|
|
|
|
|
2015-02-05 18:39:37 +01:00
|
|
|
uint32 check_samples = PACKET_SAMPLES;
|
2014-09-06 04:48:37 +02:00
|
|
|
|
|
|
|
|
if(initial_rx)
|
2015-02-05 18:39:37 +01:00
|
|
|
check_samples = PACKET_SAMPLES * 3;
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-06-02 00:30:00 +02:00
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
if(cfbContains(RX4_cb) >= check_samples )
|
|
|
|
|
{
|
2015-06-02 00:30:00 +02:00
|
|
|
for( i=0 ; i< PACKET_SAMPLES ; i++)
|
2014-09-06 04:48:37 +02:00
|
|
|
{
|
|
|
|
|
//output("Fetching from end buffer \n");
|
|
|
|
|
// Set up the outbound packet
|
|
|
|
|
fsample = cbReadFloat(RX4_cb);
|
2015-06-02 00:30:00 +02:00
|
|
|
// // put the fsample into the outbound packet
|
|
|
|
|
//
|
2014-09-06 04:48:37 +02:00
|
|
|
((Complex*)buf_desc->buf_ptr)[i].real = fsample;
|
2015-05-26 21:53:21 +02:00
|
|
|
((Complex*)buf_desc->buf_ptr)[i].imag = fsample;
|
2015-02-06 18:27:23 +01:00
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
}
|
|
|
|
|
} else {
|
2015-05-26 21:52:48 +02:00
|
|
|
//output("RX Starved buffer out\n");
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-02-05 18:38:54 +01:00
|
|
|
memset( buf_desc->buf_ptr, 0, PACKET_SAMPLES * sizeof(Complex));
|
|
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
if(initial_rx)
|
|
|
|
|
initial_rx = FALSE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
} else if ( (buf_desc->stream_id & 1) == 1) { //TX BUFFER
|
|
|
|
|
// If 'initial_rx' flag, clear buffers TX1, TX2, TX3, TX4
|
|
|
|
|
if(initial_tx)
|
|
|
|
|
{
|
|
|
|
|
TX1_cb->start = 0; // Clear buffers RX1, RX2, RX3, RX4
|
|
|
|
|
TX1_cb->end = 0;
|
|
|
|
|
TX2_cb->start = 0;
|
|
|
|
|
TX2_cb->end = 0;
|
|
|
|
|
TX3_cb->start = 0;
|
|
|
|
|
TX3_cb->end = 0;
|
|
|
|
|
TX4_cb->start = 0;
|
|
|
|
|
TX4_cb->end = 0;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Clear filter memory */
|
|
|
|
|
|
2015-02-05 18:38:54 +01:00
|
|
|
memset(tx_float_in_24k, 0, MEM_24 * sizeof(float));
|
|
|
|
|
memset(tx_float_in_8k, 0, MEM_8 * sizeof(float));
|
2014-09-06 04:48:37 +02:00
|
|
|
|
|
|
|
|
/* Requires us to set initial_rx to FALSE which we do at the end of
|
|
|
|
|
* the first loop
|
|
|
|
|
*/
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
initial_rx = TRUE;
|
|
|
|
|
// Check for new receiver input packet & move to TX1_cb.
|
|
|
|
|
|
2015-02-05 18:39:37 +01:00
|
|
|
for( i = 0 ; i < PACKET_SAMPLES ; i++ )
|
2014-09-06 04:48:37 +02:00
|
|
|
{
|
|
|
|
|
//output("Outputting ")
|
|
|
|
|
// fsample = Get next float from packet;
|
|
|
|
|
cbWriteFloat(TX1_cb, ((Complex*)buf_desc->buf_ptr)[i].real);
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
//
|
|
|
|
|
// Check for >= 384 samples in TX1_cb and spin downsampler
|
|
|
|
|
// Convert to shorts and move to TX2_cb.
|
2015-06-02 00:30:00 +02:00
|
|
|
if(cfbContains(TX1_cb) >= DV_PACKET_SAMPLES * DECIMATION_FACTOR)
|
2014-09-06 04:48:37 +02:00
|
|
|
{
|
2015-06-02 00:30:00 +02:00
|
|
|
for(i=0 ; i< DV_PACKET_SAMPLES * DECIMATION_FACTOR ; i++)
|
2014-09-06 04:48:37 +02:00
|
|
|
{
|
|
|
|
|
tx_float_in_24k[i + MEM_24] = cbReadFloat(TX1_cb);
|
|
|
|
|
}
|
|
|
|
|
|
2015-06-02 00:30:00 +02:00
|
|
|
fdmdv_24_to_8(tx_float_out_8k, &tx_float_in_24k[MEM_24], DV_PACKET_SAMPLES);
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-06-02 00:30:00 +02:00
|
|
|
for(i=0 ; i < DV_PACKET_SAMPLES ; i++)
|
2014-09-06 04:48:37 +02:00
|
|
|
{
|
2015-06-02 01:10:34 +02:00
|
|
|
cbWriteShort(TX2_cb, (short) (tx_float_out_8k[i]*SCALE_TX_IN));
|
2014-09-06 04:48:37 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
//
|
|
|
|
|
// // Check for >= 320 samples in TX2_cb and spin vocoder
|
|
|
|
|
// Move output to TX3_cb.
|
|
|
|
|
|
|
|
|
|
|
2015-06-02 00:30:00 +02:00
|
|
|
if ( csbContains(TX2_cb) >= DV_PACKET_SAMPLES )
|
2015-05-27 23:47:10 +02:00
|
|
|
{
|
2015-06-02 00:30:00 +02:00
|
|
|
for( i=0 ; i< DV_PACKET_SAMPLES ; i++)
|
2015-05-27 23:47:10 +02:00
|
|
|
{
|
|
|
|
|
speech_in[i] = cbReadShort(TX2_cb);
|
|
|
|
|
}
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-06-02 00:30:00 +02:00
|
|
|
//output("Speech in = %d", speech_in[0]);
|
|
|
|
|
|
2015-05-27 23:47:10 +02:00
|
|
|
/* DECODE */
|
2015-05-29 20:15:42 +02:00
|
|
|
uint32 decode_out = 0;
|
2015-06-02 00:30:00 +02:00
|
|
|
decode_out = thumbDV_encode(_dv_serial_fd, speech_in, (unsigned char * )mod_out, DV_PACKET_SAMPLES);
|
2015-06-18 01:04:43 +02:00
|
|
|
}
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-06-18 01:04:43 +02:00
|
|
|
FILE * dat = NULL;
|
|
|
|
|
|
|
|
|
|
if ( write_dat ) {
|
|
|
|
|
dat = fopen("gmsk_txNew2.dat", "a");
|
2015-05-27 23:47:10 +02:00
|
|
|
}
|
2015-06-18 01:04:43 +02:00
|
|
|
if ( initial_tx ) {
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-06-18 01:04:43 +02:00
|
|
|
initial_tx = FALSE;
|
|
|
|
|
float buf[5];
|
|
|
|
|
uint32 j = 0;
|
|
|
|
|
/* Create Sync */
|
|
|
|
|
for ( i = 0 ; i < 64 * 2 ; i += 2 ) {
|
|
|
|
|
gmsk_encode(_gmsk_mod, TRUE, buf, DSTAR_RADIO_BIT_LENGTH);
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-06-18 01:04:43 +02:00
|
|
|
for ( j = 0 ; j < DSTAR_RADIO_BIT_LENGTH ; j++ ) {
|
|
|
|
|
cbWriteFloat(TX4_cb, buf[j]);
|
|
|
|
|
}
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-06-18 01:04:43 +02:00
|
|
|
gmsk_encode(_gmsk_mod, FALSE, buf, DSTAR_RADIO_BIT_LENGTH);
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-06-18 01:04:43 +02:00
|
|
|
for ( j = 0 ; j < DSTAR_RADIO_BIT_LENGTH ; j++ ) {
|
|
|
|
|
cbWriteFloat(TX4_cb, buf[j]);
|
|
|
|
|
}
|
|
|
|
|
}
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-06-18 01:04:43 +02:00
|
|
|
for ( i = 0 ; i < FRAME_SYNC_LENGTH_BITS ; i++ ) {
|
|
|
|
|
gmsk_encode(_gmsk_mod, FRAME_SYNC_BITS[i], buf, DSTAR_RADIO_BIT_LENGTH);
|
|
|
|
|
|
|
|
|
|
for ( j = 0 ; j < DSTAR_RADIO_BIT_LENGTH ; j++ ) {
|
|
|
|
|
cbWriteFloat(TX4_cb, buf[j]);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// fclose(dat);
|
|
|
|
|
|
|
|
|
|
// dstar_header tmp_h;
|
|
|
|
|
// tmp_h.flag1 = 0;
|
|
|
|
|
// tmp_h.flag2 = 0;
|
|
|
|
|
// tmp_h.flag3 = 0;
|
|
|
|
|
//
|
|
|
|
|
// strncpy((char*)tmp_h.destination_rptr, "DIRECT", 9);
|
|
|
|
|
// strncpy((char*)tmp_h.departure_rptr, "DIRECT", 9);
|
|
|
|
|
// strncpy((char*)tmp_h.companion_call, "CQCQCQ", 9);
|
|
|
|
|
// strncpy((char*)tmp_h.own_call1, "K5SDR", 9);
|
|
|
|
|
// strncpy((char*)tmp_h.own_call1, "K5SDR", 9);
|
|
|
|
|
//
|
|
|
|
|
// dstar_pfcs pfcs;
|
|
|
|
|
// pfcs.crc16 = 0xFFFF;
|
|
|
|
|
// dstar_pfcsUpdateBuffer(&pfcs, (unsigned char * ) &tmp_h, 312);
|
|
|
|
|
// dstar_pfcsResult(&pfcs, (unsigned char * )&(tmp_h.p_fcs));
|
|
|
|
|
//
|
|
|
|
|
// BOOL bits[FEC_SECTION_LENGTH_BITS] = {0};
|
|
|
|
|
//
|
|
|
|
|
// gmsk_bytesToBits((unsigned char *) &tmp_h, bits, 328);
|
|
|
|
|
// BOOL encoded[330*2] = {0};
|
|
|
|
|
// BOOL interleaved[330*2] = {0};
|
|
|
|
|
// BOOL scrambled[330*2] = {0};
|
|
|
|
|
// uint32 outLen = 0;
|
|
|
|
|
// dstar_FECencode(bits, encoded, 330, &outLen);
|
|
|
|
|
// //output("Encode outLen = %d\n", outLen);
|
|
|
|
|
//
|
|
|
|
|
// outLen = 660;
|
|
|
|
|
// dstar_interleave(encoded, interleaved, outLen);
|
|
|
|
|
//
|
|
|
|
|
// uint32 count = 0;
|
|
|
|
|
// dstar_scramble(interleaved, scrambled, outLen, &count);
|
|
|
|
|
//output("Count = %d\n", count);
|
|
|
|
|
// for ( i = 0 ; i < count ; i++ ) {
|
|
|
|
|
// gmsk_encode(_gmsk_mod, scrambled[i], buf, DSTAR_RADIO_BIT_LENGTH);
|
|
|
|
|
// for ( j = 0 ; j < DSTAR_RADIO_BIT_LENGTH ; j++ ) {
|
|
|
|
|
// cbWriteFloat(TX4_cb, buf[j]);
|
|
|
|
|
// //fprintf(dat, "%d %.12f\n", data_i++, buf[j]);
|
|
|
|
|
// }
|
|
|
|
|
// }
|
|
|
|
|
|
|
|
|
|
//fclose(dat);
|
|
|
|
|
|
|
|
|
|
}
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-02-05 18:39:37 +01:00
|
|
|
uint32 tx_check_samples = PACKET_SAMPLES;
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-06-18 01:04:43 +02:00
|
|
|
if ( !initial_tx && cfbContains(TX4_cb) < PACKET_SAMPLES * 5) {
|
|
|
|
|
for ( i = 0 ; i < 13 ; i++ ) {
|
|
|
|
|
float buf[5];
|
|
|
|
|
uint32 j = 0;
|
|
|
|
|
gmsk_encode(_gmsk_mod, TRUE, buf, DSTAR_RADIO_BIT_LENGTH);
|
|
|
|
|
|
|
|
|
|
for ( j = 0 ; j < DSTAR_RADIO_BIT_LENGTH ; j++ ) {
|
|
|
|
|
cbWriteFloat(TX4_cb, buf[j]);
|
|
|
|
|
// if ( write_dat ) fprintf(dat, "%d %.12f\n", data_i++, buf[j]);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
gmsk_encode(_gmsk_mod, FALSE, buf, DSTAR_RADIO_BIT_LENGTH);
|
|
|
|
|
|
|
|
|
|
for ( j = 0 ; j < DSTAR_RADIO_BIT_LENGTH ; j++ ) {
|
|
|
|
|
cbWriteFloat(TX4_cb, buf[j]);
|
|
|
|
|
// if ( write_dat ) fprintf(dat, "%d %.12f\n", data_i++, buf[j]);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// if ( write_dat ) {
|
|
|
|
|
// fclose(dat);
|
|
|
|
|
//
|
|
|
|
|
// sync();
|
|
|
|
|
// write_dat = FALSE;
|
|
|
|
|
// }
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
|
|
|
|
|
if(cfbContains(TX4_cb) >= tx_check_samples )
|
|
|
|
|
{
|
2015-02-05 18:39:37 +01:00
|
|
|
for( i = 0 ; i < PACKET_SAMPLES ; i++)
|
2014-09-06 04:48:37 +02:00
|
|
|
{
|
2015-06-18 01:04:43 +02:00
|
|
|
//output("Fetching from end buffer \n");
|
2014-09-06 04:48:37 +02:00
|
|
|
// Set up the outbound packet
|
|
|
|
|
fsample = cbReadFloat(TX4_cb);
|
2015-06-18 01:04:43 +02:00
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
// put the fsample into the outbound packet
|
|
|
|
|
((Complex*)buf_desc->buf_ptr)[i].real = fsample;
|
|
|
|
|
((Complex*)buf_desc->buf_ptr)[i].imag = fsample;
|
|
|
|
|
}
|
|
|
|
|
} else {
|
2015-05-26 21:52:48 +02:00
|
|
|
//output("TX Starved buffer out\n");
|
2014-09-06 04:48:37 +02:00
|
|
|
|
2015-02-05 18:38:54 +01:00
|
|
|
memset( buf_desc->buf_ptr, 0, PACKET_SAMPLES * sizeof(Complex));
|
|
|
|
|
|
2015-06-18 01:04:43 +02:00
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
}
|
|
|
|
|
|
2015-06-18 01:04:43 +02:00
|
|
|
initial_tx = FALSE;
|
|
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
}
|
|
|
|
|
|
2015-02-05 18:29:44 +01:00
|
|
|
|
|
|
|
|
emit_waveform_output(buf_desc);
|
|
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
hal_BufferRelease(&buf_desc);
|
|
|
|
|
}
|
|
|
|
|
} while(1); // Seems infinite loop but will exit once there are no longer any buffers linked in _Waveformlist
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
_waveform_thread_abort = TRUE;
|
2015-05-27 23:47:10 +02:00
|
|
|
|
2015-06-03 21:14:10 +02:00
|
|
|
gmsk_destroyDemodulator(_gmsk_demod);
|
|
|
|
|
gmsk_destroyModulator(_gmsk_mod);
|
|
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void sched_waveform_Init(void)
|
|
|
|
|
{
|
2015-06-16 22:32:59 +02:00
|
|
|
//dstar_FECTest();
|
2015-06-11 16:20:37 +02:00
|
|
|
//exit(0);
|
2015-06-03 19:59:32 +02:00
|
|
|
|
2015-06-11 21:13:33 +02:00
|
|
|
_dstar = dstar_createMachine();
|
|
|
|
|
|
2015-06-03 19:59:32 +02:00
|
|
|
_gmsk_demod = gmsk_createDemodulator();
|
|
|
|
|
_gmsk_mod = gmsk_createModulator();
|
2015-06-18 01:04:43 +02:00
|
|
|
_gmsk_mod->m_invert = TRUE;
|
2015-06-03 19:59:32 +02:00
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
pthread_rwlock_init(&_list_lock, NULL);
|
|
|
|
|
|
|
|
|
|
pthread_rwlock_wrlock(&_list_lock);
|
|
|
|
|
_root = (BufferDescriptor)safe_malloc(sizeof(buffer_descriptor));
|
|
|
|
|
memset(_root, 0, sizeof(buffer_descriptor));
|
|
|
|
|
_root->next = _root;
|
|
|
|
|
_root->prev = _root;
|
|
|
|
|
pthread_rwlock_unlock(&_list_lock);
|
|
|
|
|
|
|
|
|
|
sem_init(&sched_waveform_sem, 0, 0);
|
|
|
|
|
|
|
|
|
|
pthread_create(&_waveform_thread, NULL, &_sched_waveform_thread, NULL);
|
2014-10-21 17:35:43 +02:00
|
|
|
|
|
|
|
|
struct sched_param fifo_param;
|
2015-01-15 19:02:55 +01:00
|
|
|
fifo_param.sched_priority = 30;
|
2014-10-21 17:35:43 +02:00
|
|
|
pthread_setschedparam(_waveform_thread, SCHED_FIFO, &fifo_param);
|
2015-06-03 19:53:50 +02:00
|
|
|
|
2015-06-10 18:07:16 +02:00
|
|
|
// gmsk_testBitsAndEncodeDecode();
|
2015-06-11 16:20:37 +02:00
|
|
|
// exit(0);
|
2015-06-03 19:53:50 +02:00
|
|
|
|
2014-09-06 04:48:37 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void sched_waveformThreadExit()
|
|
|
|
|
{
|
|
|
|
|
_waveform_thread_abort = TRUE;
|
|
|
|
|
sem_post(&sched_waveform_sem);
|
|
|
|
|
}
|