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Merge pull request #1398 from Socalix/heltecv4-register1
Improve Heltec v4 RX reception with undocumented register patch
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commit
f7e92a7cd1
2 changed files with 14 additions and 5 deletions
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@ -76,6 +76,14 @@ class CustomSX1262 : public SX1262 {
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setRfSwitchPins(SX126X_RXEN, SX126X_TXEN);
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setRfSwitchPins(SX126X_RXEN, SX126X_TXEN);
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#endif
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#endif
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// for improved RX with Heltec v4
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#ifdef SX126X_REGISTER_PATCH
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uint8_t r_data = 0;
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readRegister(0x8B5, &r_data, 1);
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r_data |= 0x01;
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writeRegister(0x8B5, &r_data, 1);
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#endif
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return true; // success
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return true; // success
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}
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}
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@ -17,18 +17,19 @@ build_flags =
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-D P_LORA_SCLK=9
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-D P_LORA_SCLK=9
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-D P_LORA_MISO=11
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-D P_LORA_MISO=11
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-D P_LORA_MOSI=10
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-D P_LORA_MOSI=10
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-D P_LORA_PA_POWER=7 ;power en
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-D P_LORA_PA_POWER=7 ; VFEM_Ctrl - Power on GC1109
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-D P_LORA_PA_EN=2
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-D P_LORA_PA_EN=2 ; PA CSD - Enable GC1109
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-D P_LORA_PA_TX_EN=46 ;enable tx
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-D P_LORA_PA_TX_EN=46 ; PA CPS - GC1109 TX PA full(High) / bypass(Low)
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-D PIN_USER_BTN=0
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-D PIN_USER_BTN=0
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-D PIN_VEXT_EN=36
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-D PIN_VEXT_EN=36
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-D PIN_VEXT_EN_ACTIVE=LOW
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-D PIN_VEXT_EN_ACTIVE=LOW
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-D LORA_TX_POWER=10 ;If it is configured as 10 here, the final output will be 22 dbm.
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-D LORA_TX_POWER=10 ;If it is configured as 10 here, the final output will be 22 dbm.
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-D MAX_LORA_TX_POWER=22 ; Max SX1262 output
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-D MAX_LORA_TX_POWER=22 ; Max SX1262 output
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-D SX126X_DIO2_AS_RF_SWITCH=true
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-D SX126X_REGISTER_PATCH=1 ; Patch register 0x8B5 for improved RX
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-D SX126X_DIO2_AS_RF_SWITCH=true ; GC1109 CTX is controlled by SX1262 DIO2
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-D SX126X_DIO3_TCXO_VOLTAGE=1.8
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-D SX126X_DIO3_TCXO_VOLTAGE=1.8
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-D SX126X_CURRENT_LIMIT=140
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-D SX126X_CURRENT_LIMIT=140
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-D SX126X_RX_BOOSTED_GAIN=1
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-D SX126X_RX_BOOSTED_GAIN=1 ; In some cases, commenting this out will improve RX
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-D PIN_GPS_RX=38
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-D PIN_GPS_RX=38
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-D PIN_GPS_TX=39
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-D PIN_GPS_TX=39
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-D PIN_GPS_RESET=42
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-D PIN_GPS_RESET=42
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