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Hold GC1109 PA_POWER during deep sleep for LNA RX wake
The GC1109 FEM needs its VFEM_Ctrl pin held HIGH during deep sleep to keep the LNA active, enabling proper RX sensitivity for wake-on-packet. Without this, the LNA is unpowered during sleep and RX wake sensitivity is degraded by ~17dB. Release RTC holds in begin() after configuring GPIO registers (not before) to ensure glitch-free pin transitions on wake. Trade-off: ~6.5mA additional sleep current for significantly improved wake-on-packet range.
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06ab9f7f6b
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3 changed files with 23 additions and 9 deletions
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@ -6,12 +6,17 @@ void HeltecTrackerV2Board::begin() {
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pinMode(PIN_ADC_CTRL, OUTPUT);
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digitalWrite(PIN_ADC_CTRL, LOW); // Initially inactive
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// Set up digital GPIO registers before releasing RTC hold. The hold latches
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// the pad state including function select, so register writes accumulate
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// without affecting the pad. On hold release, all changes apply atomically
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// (IO MUX switches to digital GPIO with output already HIGH — no glitch).
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pinMode(P_LORA_PA_POWER, OUTPUT);
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digitalWrite(P_LORA_PA_POWER,HIGH);
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rtc_gpio_hold_dis((gpio_num_t)P_LORA_PA_POWER);
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rtc_gpio_hold_dis((gpio_num_t)P_LORA_PA_EN);
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pinMode(P_LORA_PA_EN, OUTPUT);
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digitalWrite(P_LORA_PA_EN,HIGH);
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rtc_gpio_hold_dis((gpio_num_t)P_LORA_PA_EN);
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pinMode(P_LORA_PA_TX_EN, OUTPUT);
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digitalWrite(P_LORA_PA_TX_EN,LOW);
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@ -48,7 +53,9 @@ void HeltecTrackerV2Board::begin() {
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rtc_gpio_hold_en((gpio_num_t)P_LORA_NSS);
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rtc_gpio_hold_en((gpio_num_t)P_LORA_PA_EN); //It also needs to be enabled in receive mode
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// Hold GC1109 FEM pins during sleep to keep LNA active for RX wake
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rtc_gpio_hold_en((gpio_num_t)P_LORA_PA_POWER);
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rtc_gpio_hold_en((gpio_num_t)P_LORA_PA_EN);
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if (pin_wake_btn < 0) {
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esp_sleep_enable_ext1_wakeup( (1L << P_LORA_DIO_1), ESP_EXT1_WAKEUP_ANY_HIGH); // wake up on: recv LoRa packet
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@ -17,11 +17,11 @@ build_flags =
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-D P_LORA_SCLK=9
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-D P_LORA_MISO=11
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-D P_LORA_MOSI=10
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-D P_LORA_PA_POWER=7 ;power en
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-D P_LORA_PA_EN=4
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-D P_LORA_PA_TX_EN=46 ;enable tx
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-D LORA_TX_POWER=10 ;If it is configured as 10 here, the final output will be 22 dbm.
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-D MAX_LORA_TX_POWER=22 ;Max SX1262 output
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-D P_LORA_PA_POWER=7 ; VFEM_Ctrl - GC1109 LDO power enable
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-D P_LORA_PA_EN=4 ; CSD - GC1109 chip enable (HIGH=on)
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-D P_LORA_PA_TX_EN=46 ; CPS - GC1109 PA mode (HIGH=full PA, LOW=bypass)
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-D LORA_TX_POWER=10 ; 10dBm + ~11dB GC1109 gain = ~21dBm output
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-D MAX_LORA_TX_POWER=22 ; Max SX1262 output -> ~28dBm at antenna
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-D SX126X_DIO2_AS_RF_SWITCH=true
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-D SX126X_DIO3_TCXO_VOLTAGE=1.8
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-D SX126X_CURRENT_LIMIT=140
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@ -7,12 +7,17 @@ void HeltecV4Board::begin() {
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pinMode(PIN_ADC_CTRL, OUTPUT);
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digitalWrite(PIN_ADC_CTRL, LOW); // Initially inactive
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// Set up digital GPIO registers before releasing RTC hold. The hold latches
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// the pad state including function select, so register writes accumulate
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// without affecting the pad. On hold release, all changes apply atomically
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// (IO MUX switches to digital GPIO with output already HIGH — no glitch).
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pinMode(P_LORA_PA_POWER, OUTPUT);
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digitalWrite(P_LORA_PA_POWER,HIGH);
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rtc_gpio_hold_dis((gpio_num_t)P_LORA_PA_POWER);
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rtc_gpio_hold_dis((gpio_num_t)P_LORA_PA_EN);
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pinMode(P_LORA_PA_EN, OUTPUT);
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digitalWrite(P_LORA_PA_EN,HIGH);
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rtc_gpio_hold_dis((gpio_num_t)P_LORA_PA_EN);
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pinMode(P_LORA_PA_TX_EN, OUTPUT);
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digitalWrite(P_LORA_PA_TX_EN,LOW);
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@ -50,7 +55,9 @@ void HeltecV4Board::begin() {
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rtc_gpio_hold_en((gpio_num_t)P_LORA_NSS);
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rtc_gpio_hold_en((gpio_num_t)P_LORA_PA_EN); //It also needs to be enabled in receive mode
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// Hold GC1109 FEM pins during sleep to keep LNA active for RX wake
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rtc_gpio_hold_en((gpio_num_t)P_LORA_PA_POWER);
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rtc_gpio_hold_en((gpio_num_t)P_LORA_PA_EN);
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if (pin_wake_btn < 0) {
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esp_sleep_enable_ext1_wakeup( (1L << P_LORA_DIO_1), ESP_EXT1_WAKEUP_ANY_HIGH); // wake up on: recv LoRa packet
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